在廣播壓縮環境下降低全速掃描鏈測試時發射週期功率之技術

Abstract

電源供應之雜訊導致的良率損失是即時掃描鏈測試正受到的一大挑戰。測試期間過度的轉換行為導致異常的IR下降並且可能引起無缺陷電路在延遲測試時被誤判。通常，我們能使用X填充技術解決這個問題。 另一方面，隨著IC的大小日益劇增與IC製造技術演進，測試圖樣的數量也爆炸性的提昇。因此，測試資料壓縮變成必備的。通常，測試壓縮技術被分類成三種：代碼式、線性解壓縮器式以及廣播式。 本篇論文是第一篇去嘗試降低廣播式壓縮環境下全速掃描鏈測試時的電源供應雜訊，提出的核心方法是X片段開啟技術，其中包含了掃描鏈插入偏移之硬體架構及產生偏移配置之演算法。利用被開啟的X片段，增進以X填充降低發射週期轉換行為的效率。 實驗中使用ISCAS89及ITC99基準電路來驗證本篇論文所提出的技術之效能。我們能看見所有電路的發射週期加權轉換行為被降低了30%，而導致的資料量上昇不超過5%。

Power supply noise induced test yield loss is challenging at-speed testing. Excessive switching activity during test application results in abnormal IR-drop and may cause a timing-defect-free circuit to fail the delay fault test. Usually, we can use X-fill techniques to solve this problem. On the other hand, as designs become larger and IC fabrication processes advance, the number of test patterns needed has exploded. Therefore, test compression becomes a necessity. Usually, test compression technique is categorized into three: code-based, linear-decompressor-based, and broadcast-based. This thesis is the first attempt to reduce power supply noise in the broadcast-based compression environment for at-speed scan testing. The core technology is the X-slice creation technique; it comprises the scan chain skew insertion hardware and the skew configuration generation algorithm. With the created X-slice, the efficiency of X-filling to lower the launch cycle switching activities is improved. Effectiveness of the proposed technique is validated with ISCAS89 and ITC99 benchmark circuit. We can see that the launch cycle weighted switching activity is reduced by 30% in average with the data volume overhead below 5% for all circuits.