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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42412完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林宗賢(Tsung-Hsien Lin) | |
| dc.contributor.author | Chien-Jung Chou | en |
| dc.contributor.author | 周健榮 | zh_TW |
| dc.date.accessioned | 2021-06-15T01:13:21Z | - |
| dc.date.available | 2014-08-11 | |
| dc.date.copyright | 2009-08-11 | |
| dc.date.issued | 2009 | |
| dc.date.submitted | 2009-07-29 | |
| dc.identifier.citation | [1] Q. Huang and M. Oberle, “A 0.5-mW passive telemetry IC for biomedical applications,” IEEE J. Solid-State Circuits, vol. 33, pp. 937-946, July. 1998.
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42412 | - |
| dc.description.abstract | 隨著人口老化，低功率、小面積與可攜式之生醫偵測系統的需求日益增加，在此系統裡，其中一個關鍵部份是前端的類比信號讀取電路。本論文的重點在於設計一個應用於生醫系統的低功率低雜訊前端讀取電路。此外，本論文的另一項重點在應用於現今通訊系統中的可調變增益放大器設計。
本論文所提出的生醫系統讀取電路，是利用電流操作模式的儀表放大器架構來實現系統中的放大器，採用主動式電阻電容積分器消除放大器本身的直流偏移電壓，其中使用操作於次臨界的電晶體來當作高阻值的電阻。為了適用各種不同的生醫信號，使用一個可程式增益放大器來對系統的放大增益做調變。另外，利用巢式削波技巧來消除低頻的閃爍雜訊與提升整體電路的共模拒斥比。最後，採用一個三階的轉導電容低通濾波器來消除被輸入端削波調變至高頻的雜訊。本電路電路採用台積電0.18微米的製程設計，可達等效輸入電壓雜訊密度6 nV/rt(Hz)與共模拒斥比 125 dB，整體電路可程式增益範圍從46 dB到80 dB，在1.0伏特電源供應下消耗182微安培電流。 本論文的另一項重點在實現一個頻寬大於100 MHz的可調變增益放大器。此放大器採用串接三級的架構，利用一個新型的虛擬指數函數產生電路來控制其增益大小，使其增益調變的線性範圍大於傳統的可調變增益放大器。使用源級褪化技巧與前饋式偏壓消除電路，分別提升電路的線性度與消除直流偏移電壓。此可調變增益放大器採用台積電0.18微米的製程製造，模擬結果得到可調變增益範圍從-44 dB 到 30 dB，頻寬為166 MHz 到304 MHz，IIP3從-35 dBm 到 8.26 dBm，整個電路在1.5伏特電源供應下消耗950微瓦。 | zh_TW |
| dc.description.abstract | With the population ageing, there is a growing demand for the low-power, small-size and ambulatory biomeical monitoring system. A crucial block in the biomedical system is the analog readout front-end. The thesis focuses on the design of low-power and low-noise readout circuitrs for the biomedical application. The other focus of the thesis is the design of variable gain amplifier (VGA) for the modern communuication systems.
The biomedical readout circuits are based on current-mode instrumentation amplifier (CMIA) topology to implemene the amplifiers. To remove the DC offset of CMIA, an active-RC integrator with the subthreshold-biased pMOS as high reisitance is used. A programmable gain amplifier (PGA) is adopted to set the overall gain to support various biomedical signals. Besides, the nested-chopper technique is used to reduce the flicker noise and increases common-mode rejection ratio (CMRR). Finally, a 3th –order elliptic Gm-C low-pass filter removes the high-frequency noise modulated by the input chopper. The readout circuits are fabricated in 0.18- | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T01:13:21Z (GMT). No. of bitstreams: 1 ntu-98-R94942130-1.pdf: 3061200 bytes, checksum: b5b0802d5ef4710ac765a63913e17438 (MD5) Previous issue date: 2009 | en |
| dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 1 1.2 Thesis Overview 4 Chapter 2 Fundamentals of Readout Front-End 5 2.1 Introduction 5 2.2 Offset and Noise in CMOS Amplifier 5 2.2.1 Basic CMOS Amplifier 5 2.2.2 Noise Spectrum Analysis 6 2.3 Circuit Techniques for Reducing Offset and Noise 7 2.3.1 Classification 7 2.3.2 Autozero Technique 7 2.3.3 Chopper Technique 9 2.4 Instrumentation Amplifier 16 Chapter 3 Biomedical Readout Circuits Design 19 3.1 Introduction 19 3.2 The architecture of Readout Circuits 19 3.3 Design and Implementation of Instrumentation Amplifier 21 3.3.1 Basic Principle of Instrumentation Amplifier 21 3.3.2 Low-Noise and Low-Voltage Design Considerations 23 3.3.3 Low-Power Design Methodology 24 3.3.4 DC Offset Rejection Circuit 27 3.3.5 Programmable Gain Amplifier 30 3.3.6 Chopper Modulator 32 3.3.7 Clock Generator 32 3.3.8 Frequency Divider 33 3.4 Design and Implementation of Low Pass Filter Design 33 3.4.1 Introduction 33 3.4.2 Design of Low-Gm Operational Transconductance Amplifier 34 3.4.3 Filter Approximation Type 38 3.4.4 Ladder Prototype of 3rd-order Elliptic Filter 39 3.4.5 Implementation of the Balanced Gm-C Filter 40 3.5 Simulation Results 41 3.5.1 Instrumentation Amplifier 41 3.5.2 Low-Pass Filter 45 3.6 Summary of the Simulation Results 46 Chapter 4 Wide Bandwidth Variable Gain Amplifier 47 4.1 Introduction 47 4.2 The Architecture of the Variable Gain Amplifier 48 4.3 Design and Implementation of Exponential Function Generator 49 4.3.1 Decibel Linear Function 49 4.3.2 Exponential Voltage-to-Current Converter 51 4.4 Design and Implementation of Variable Gain Amplifier 55 4.4.1 Basic Principle of Gain Tuning 55 4.4.2 Design Consideration for Linearity 57 4.4.3 DC Offset Cancellation 58 4.4.4 Active-Feedback Circuit 60 4.5 Simulation Results 62 4.6 Summary of Simulation Results 65 Chapter 5 Experimental Results 67 5.1 Chip Pin Configurations and Printed Circuit Board Design 67 5.1.1 Chip Pin Configurations 67 5.1.2 PCB Design 68 5.2 Measurement Setup 70 5.2.1 Frequency Response Measurement Setup 70 5.2.2 Noise Measurement Setup 71 5.3 Measurement Results 72 5.3.1 Frequency Response Measurement 72 5.3.2 Noise Measurement 76 5.4 Summary of Measured Results 81 Chapter 6 Conclusions and Future Works 85 6.1 Conclusions 85 6.2 Future Works 86 References 89 | |
| dc.language.iso | en | |
| dc.title | 應用於生醫系統之低功率低雜訊互補式金氧半讀取電路設計 | zh_TW |
| dc.title | CMOS Low-power and Low-noise Readout Circuits for Biomedical Applications | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 97-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 陳信樹(Hsin-Shu Chen),曾英哲 | |
| dc.subject.keyword | 前端讀取電路,儀表放大器,削波,可調變增益放大器,虛擬指數函數產生器, | zh_TW |
| dc.subject.keyword | readout front-end,instrumentation amplifier,chopper,variable gain amplifier,pseudo-exponential function generator, | en |
| dc.relation.page | 94 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2009-07-29 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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