請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42157
完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 盧信嘉(Hsin-Chia Lu) | |
dc.contributor.author | Tian-Bin Lin | en |
dc.contributor.author | 林天斌 | zh_TW |
dc.date.accessioned | 2021-06-15T00:49:52Z | - |
dc.date.available | 2008-09-02 | |
dc.date.copyright | 2008-09-02 | |
dc.date.issued | 2008 | |
dc.date.submitted | 2008-08-18 | |
dc.identifier.citation | [1] Ali M. Niknejad, Analysis, Simulation, and Applications of Passive Devices on Conductive Substrate, PHD Thesis, Electrical Engineering and Computer Science, UC Berkeley, 2000.
[2] H. L. Tu, The Study on Wireless Transceiver Front-end Circuits and Related Passive, Master’s Thesis, Department of Electrical Engineering, National Central University, 2005. [3] C. Patrick Yue, and S. Simon Wong, “On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC’s,” IEEE Journal of Solid-State Circuits, vol. 33, no. 5, pp. 743-751, May 1998. [4] Kari Stadius, Mikko Kaltiokallio, and Kari Halonen, “An Automated EM-Simulation Procedure for Generation of Monolithic Inductor Library,” in Proc. European Microwave Conference, vol. 2, pp. 4 , Oct. 2005. [5] Sheng-Mou Lin, Li-Qun Yang, and Hong-Yang Chang, “Scalable Lumped Model with Multiple Physical Parameters for Embedded Passives,” in Proc. 2005 IEEE Electronic Components and Technology Conference, vol. 2, pp. 1842-1845, May 2005. [6] H. M. Greenhouse, “Design of Planar Rectangular Microelectronic Inductors,” IEEE Trans on Parts, Hybrids, and Packaging, vol. 10, issue 2, pp. 101-109, June 1974. [7] Rong Jiang, and Charlie Chung-Ping Chen, “ESPRIT: A Compact Reluctance Based Interconnect Model Considering Lossy Substrate Eddy Current,” in 2004 IEEE International Microwave Symposium (IMS), vol. 3, pp. 1385-1388, June 2004. [8] Guoan Zhong, and Cheng-Kok Koh, “Exact Closed Form Formula for Partial Mutual Inductances of On-Chip Interconnects,” in Proc. 2002 IEEE International Conference on Computer Design, pp. 428-433, 16-18 Sept 2002. [9] Andreas Weisshaar, Hai Lan, and Amy Luoh, “Accurate Closed-Form Expressions for the Frequency-Dependent Line Parameters of On-Chip Interconnects on Lossy Silicon Substrate,” IEEE Trans. on Advanced Packaging, vol. 25, issue 2, pp. 288-196, May 2002. [10] Seong-Mo Yim, Tong Chen, and Kenneth K. O, “The Effects of a Ground Shield on the Characteristics and Performance of Spiral Inductors,” IEEE Journal of Solid-State Circuits, vol. 37, no. 2, pp. 237-244, Feb. 2002. [11] Y. J. E. Chen, D. Heo, J. Laskar, and T. Anderson, “Investigation of Q enhancement for inductors processed in BiCMOS technology,” in Proc. 1999 IEEE Radio and Wireless Conference, Aug. 1999, pp. 263-266, Aug. 1999. [12] Y. E. Chen, D. Bien, D. Heo, and J. Laskar, “Q-Enhancement of Spiral Inductor with N+-Diffusion Patterned Ground Shields,” in 2001 IEEE International Microwave Symposium (IMS), vol. 2, pp. 1289-1292, May 2001. [13] K. T. Ng, B. Rejaei, and J. N. Burghartz, “Ground pattern for improved characteristics of spiral RF transformers on silicon,” IEEE Topical Silicon Monolithic IC RF Syst. Meeting, 2001, pp. 75-78, Sept. 2001. [14] Y. S. Lin, C. C. Chen, H. B. Liang, T. Wang, and S. S Lu, “Characterization and Modeling of PGS and Silicon-Substrate Effects on Radio-Frequency Monolithic Bifilar Transformers for Ultra-Wide Band Radio-Frequency Integrated Circuit Applications,” Japanese Journal of Applied Physics, vol. 46, No. 1, pp. 65-70, 2007. [15] http://www.mwrf.com/Articles/ArticleID/12732/12732.html [16] Peter Hagn, Andreas Przadka, Volker Gebhardt, and Ulrich Bauernschmitt, “Ceramics: The Platform for Duplexers and Frontend-Modules,” IEEE Ultrasonics Symposium, Vol. 1, pp.1-10, Oct. 2002. [17] Hugh D. Young and Roger A. Freeman, Sears and Zemansky’s University Physics: with modern physics, 11th edition, Pearson Education Inc., publishing as Addison Wesley, 2004. [18] F. W. Grover, Inductance Calculations: Working Formulas and Tables. New York: Van Nostrand, 1946. [19] Richard K. Ulrich, and Leonard W. Schaper, Integrated Passive Component Technology, Wiley-IEEE Press, June 2003. [20] A. E. Ruehli, “Inductance calculations in a complex integrated circuit environment,” IBM J. Res. Development, pp.470-481, Sept. 1972. [21] D. K. Su, M. J. Loinaz, S. Masui, and B. A. Wooley, “Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits,” IEEE J. Solid-State Circuits, vol. 28, pp. 420-430, Apr. 1993. [22] David M. Pozar, Microwave Engineering, third edition, Wiley & Sons Inc., 2005. [23] Advanced Design System Momentum 2005, Agilent Technologies, CA 94304, U.S.A. [24] HFSS 10, Ansoft Corporation, PA 15219, U.S.A. [25] Sonnet Suites 11, Sonnet Software Inc., NY 13212, U.S.A. [26] A. E. Ruehli, and H. Heeb., “Circuit models for three-dimensional geometries including dielectrics.” IEEE Trans. on Microwave Theory and Techniques, vol. 40, pp.1507-1516, July 1992. [27] A. E. Ruehli, U. Miekkala, and H. Heeb., “Stability of discretized partial element equivalent EFIE circuit models,” IEEE Trans. Antennas and Propag., vol. 43, issue 6, pp. 553-559, June 1995. [28] A. E. Ruehli, “Equivalent circuit models for three-dimensional multiconductor systems.” IEEE Trans. on Microwave Theory and Techniques, vol. 22, issue 3, pp. 216-221, March, 1974. [29] C. P. Yue, “A physical model for planar spiral inductors on silicon,” IEEE Electron Devices Letters, vol. 43, pp.155-158, Dec. 1996. [30] M. Kamon, M. J. Ttsuk, and J. K. White., “Fasthenry: a multipole-accelerated 3-d inductance extraction program.” IEEE Trans. on Microwave Theory and Techniques, vol. 42, pp. 1750-1758, Sept. 1994. [31] Giulio Antonini, Mattia Di Prinzio, Alberto Petricola, and A. E. Ruehli, “Reduced Unknowns Meshing for the Partial Element Equivalent Circuit Approach,” International Symposium on IEEE Electromagneic Compatibility, vol. 3, pp 805-810, Aug. 2005. [32] T. B. Chan, Synthesis and optimization of planar spiral inductor, Master’s Thesis, Graduate Institute of Electronics Engineering College of Electrical Engineering and Computer Science, National Taiwan University, 2007. [33] Richard C. Dorf, and James A. Svoboda, Introduction to Electric Circuits, fifth edition, John Wiley & Sons, Inc., 2001. [34] L. K. Yeung, and K. L. Wu, “A Compact Second-Order LTCC Bandpass Filter With Two Finite Transmission Zeros,” IEEE Trans. on Microwave Theory and Techniques, vol. 51, no. 2, pp. 337-341, Feb. 2003. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42157 | - |
dc.description.abstract | 本論文的第一部份將介紹直線型電感的電感值計算方法,由於在RF被動電路的設計過程中,電感是眾多被動元件中影響整體效能最多的元件,因此,如何精準並且迅速的計算出電感值將是這個領域中最值得的研究的主題之一。為了準確的計算出電感值,我們描述了直線型電感的各項電氣特性並考慮了各項損耗機制,也基於此建構了一個電感等效電路,並利用部分元素等效電路(Partial element equivalent circuit)的原理,開發了一個可以快速地計算出電感的各種電氣特性的模擬計算引擎。
第二部份將展示在單一電感與耦合電感中套用圖型式接地屏蔽(Patterned ground shield)所產生的效果。由於在電感跟基板之間插入一片圖型式接地屏蔽理論上可以削弱電感與基板之間的電耦合與磁耦合因而提升電感的效能,基於此理論,本論文將對各種型態的圖型式接地屏蔽在單一電感與耦合電感上所產生的效果做特性上的研究。本論文在單一電感上套用了五種不同型態的圖型式接地屏蔽,另外在耦合電感上也套用了六種不同的型態。 | zh_TW |
dc.description.abstract | The first part of this thesis shows the method of calculating the inductance of a rectilinear inductor, since in RF design, on-chip inductor is one of the critical components that dominates the overall performance of the RF devices, thus how to calculate the inductance accurately and immediately becomes an important research topic in this field. In order to calculate inductance as precise as possible, the electrical characteristics of an inductor are carefully analyzed and the loss mechanisms are taken into account. With the proper inductor equivalent circuit and partial element equivalent circuit (PEEC) method, we developed a simulation engine which is capable to predict the inductance and Q-value of an inductor.
The second part of this thesis presents the effects on spiral inductors and coupled inductors with the presence of a patterned ground shield (PGS). Inserting a PGS between inductor and substrate eliminates both electric and magnetic couplings to the substrate, and thus enhances the performance of the inductors. Therefore, we would like to study the characteristics of applying various PGS shapes on the spiral inductors and further on the coupled inductors. In this thesis, five PGS structures are used on spiral inductor and six PGS structures are used on the coupled inductors. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T00:49:52Z (GMT). No. of bitstreams: 1 ntu-97-R95943155-1.pdf: 3575533 bytes, checksum: 2a57c09b6537624771ac4b82fda03df7 (MD5) Previous issue date: 2008 | en |
dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 1 1.2 Literature review 2 1.3 The introduction of LTCC technology 4 1.3.1 Advantages of LTCC technology 6 1.3.2 Disadvantages of LTCC technology 7 1.4 The introduction of BCB technology 7 1.4.1 Advantages of BCB technology 8 1.4.2 Disadvantages of BCB technology 8 1.5 Organization of this thesis 9 Chapter 2 Inductance Extraction Methodology 11 2.1 Rectilinear inductors 11 2.2 Inductance 13 2.3 Quality factor 14 2.4 Loss mechanisms 15 2.4.1 Metal loss 15 2.4.2 Substrate loss 17 2.4.3 Substrate coupling 18 2.5 Electrical model and extraction of an inductor 18 2.6 Calculation of electrical parameters 21 2.6.1 Partial element equivalent circuit 22 2.6.2 Meshing strategy 23 2.6.3 Formulas for calculating inductance 25 2.6.4 Parasitic capacitance calculation 26 2.6.5 Resistance calculation 28 2.7 Solving the equivalent circuit 31 2.8 Implementation details 33 Chapter 3 Experimental Results of Inductance Calculation 39 3.1 Process parameters 39 3.2 Inductors under test 40 3.3 Experimental results 42 Chapter 4 Coupled Inductors with PGS 51 4.1 Coupled inductors 51 4.1.1 Electrical model of the coupled inductors 53 4.1.2 Extraction of the coupled inductors 54 4.2 Patterned ground shield 55 4.3 Various structures of PGS 57 Chapter 5 Simulation Results of Inductors with PGS 63 5.1 Spiral inductor with various PGS shapes 63 5.1.1 Process parameters and inductor specification 63 5.1.2 Layouts and simulation results 64 5.2 Coupled inductors with various PGS shapes 68 5.2.1 Process parameters and inductor specification 68 5.2.2 Layouts and simulation results 69 Chapter 6 Conclusion 77 Reference 79 | |
dc.language.iso | en | |
dc.title | 螺旋電感感值計算及多層介質中圖型式接地屏蔽之特性研究 | zh_TW |
dc.title | Spiral inductance calculation and the study of inductors with PGS in multilayer dielectric | en |
dc.type | Thesis | |
dc.date.schoolyear | 96-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 黃俊郎,李建模 | |
dc.subject.keyword | 部分元素等效電路,圖型式接地屏蔽,耦合電感, | zh_TW |
dc.subject.keyword | Partial element equivalent circuit,patterned ground shield,coupled inductors, | en |
dc.relation.page | 81 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2008-08-18 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-97-1.pdf 目前未授權公開取用 | 3.49 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。