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標題: | 多階層長度限制碼在儲存系統上之研究 On Multi-Level Coded RLL Modulation for the Recording Channel |
作者: | Yu-Sian Ku 顧育先 |
指導教授: | 林茂昭(Mao-Chao Lin) |
關鍵字: | 多階層長度限制碼,最佳估算偵測,低密度同位校正碼,部分響應通道,無直流成分,軟進軟出, multi-level run-length-limited codes,low density parity check codes,partial response channel,DC-free,soft-in-soft-out, |
出版年 : | 2008 |
學位: | 碩士 |
摘要: | 目前的儲存系統皆使用長度限制編碼技術來有效的克服同步和符號間干擾(ISI)的問題,為了提高更多的儲存空間,多階層的長度限制編碼已被應用在光儲存系統下,有很多系統架構是結合部分反應通道與最佳估算偵測(Partial-Response Maximum Likelihood , PRML)所編解碼,本論文不同於PRML架構,而是利用軟進軟出(soft-input and soft-output)原理,以低密度同位校正碼(LDPC)作為外部編碼器,多階層長度限制碼(Multi-level RLL Codes)作為內部編碼器,以疊代方式在解調端和解碼端互相傳送bit或symbol的估測機率(soft-value),以提高解碼的正確率。另外,為了減少讀取資料時所造成的干擾,所以必須降低訊號在低頻頻率下的內容,達到無直流成分的要求,本論文也對此有做相關的探討。
首先,我們使用碼率為三分之四的三階層長度限制碼,配合碼率為二分之ㄧ的低密度同位校正碼,分別在部分響應通道為(1111)和(1221)的模式下,以白色高斯雜訊下模擬之。同時,我們提供模擬結果並可從中看到錯誤率分析及直流成分分析的改進之處下及其優點所在。 Nowadays the run-length-limited (RLL) codes are usually used to eliminate the restriction of synchronization and the intersymbol interference in the recording system. In order to increase the information recording density without changing optical or mechanical parameters, a Multi-level recording using run-length-limited (RLL) modulation is applied to the optical recording system. There are many architecture proposed which combine the partial response channel and Maximum Likelihood Detection (PRML). In this thesis, it is distinct from PRML architecture in the recording system model. We propose a serially concatenated coding system which combine with partial response channel , Multi-level RLL coded modulation and error-correct codes. We used the principle of soft-input and soft-output iterative decoding to resolve the information of data. The main idea is how to work out the soft value between binary bits and non-binary RLL coded symbols. In addition, in order to read the signal and that wasn’t interfered from the low frequency part of information, so you must reduce the direct current (DC) component. We also analysis the DC-balance issue for multi-level RLL modulation in this thesis. First, we combine a 3-level 4/3 code rate run-length-limited encoder and a 1/2 code rate LDPC encoder over the partial response channel (1111) and (1221) mode separately and run the simulation under AWGN channel model. Moreover, the simulation results reveal the improvement of our proposed architecture. We can achieve a satisfied error performance and DC-free under the RLL constraint. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42113 |
全文授權: | 有償授權 |
顯示於系所單位: | 電信工程學研究所 |
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