請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38475完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李嗣涔(Si-Chen Lee) | |
| dc.contributor.author | Yi-Chung Liang | en |
| dc.contributor.author | 梁亦中 | zh_TW |
| dc.date.accessioned | 2021-06-13T16:34:41Z | - |
| dc.date.available | 2007-07-21 | |
| dc.date.copyright | 2005-07-21 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2005-07-08 | |
| dc.identifier.citation | Bibliography
[1] Advanced PECVD Technology for Manufacturing AMLCDs SID pp.267-271 (1999) [2] K. Law, J. White and N. Turner, Society for Information Display, Digest of Technical Papers, Santa Clara, CA, pp. 67-68 (1995) [3] Q. Shang, R. Robertson and K. Law, Digest of the Display Works Technical Session, San Jose, CA,January 20-22,. Pp. 65-66. (1998) [4] High Deposition Rate PECVD Process for next Generation TFT-LCDs [5] High Deposition rate a-Si:H for the Flat Panel Display Industry J. Hautala, Z. Saleh, J.F.M. Westendrop, H. Meiling, S. Sherman and S. Wanger [6] A New Process of Fabricating Inverted-Straggered Tri-Layer Thin-Film Transistors 16, 133-135 (1995) [7] Low Temperature PECVD a-SI:H TFT for Plastic Substrates 278-281 SID (2000) [8] The Physics of Amorphous-Silicon Thin-Film Transistors 36, 2753 (1989). [9] A Novel Device structure for high voltage, high performance amorphous silicon thin-film transistors, A.M. Miri, P.S. Gudem, S.G. Chamberlian and A. Nathan [10] Amorphous Silicon Thin-Film Transistors with SiOxNy/SiNx gate insulators 29, pp229-235 (1989) [11] High Field Mobility a-Si:H TFT based on High Deposition-rate Materials, Chun-ying Chen and Jerzy Kanicki 17,437.(1996) . [12] Hydrogenated Amorphous Silicon Thin-Film Transistor with a Thin Gtae Insulator 21, 18-20 (2000) [13] High Modility Tri-Layer a-Si:H Thin Film Transistors with Ultrathin Active Layer 18,397,(1997) [14] Influence of an a-SiNx:H gate insulator on an amorphous silicon thin-film transistor 62,2129(1987) [15] Plasma enhanced chemical vapor depositioned silicon nitride as a gate dielectric film for amorphous silicon thin film transistors – a critical review, 51, 741 to 745 (1998) [16] The effect of Interface States on amorphous-silicon Transistors 36, 2971 (1989) [17] A NEW a-Si TFT with SiO2/SiNx Gate Insulator For 10.4 inch LCDS 97-99 (1991) [18] A method for the Determination of High-Field Conduction Laws in Insulating Films in the presence of Charge Trapping 43,1178 (1971) [19] Time and temperature dependence of instability mechanisms in amorphous silicon thin-filn transistors, M.J. Powell,C. van Berkel, and J.R. Hughes 54, 1323(1989). [20] Bias dependence of instability mechanisms in amorphous silicon thin-filn transistors 51, 1242(1987). [21] Resolution of amorphous silicon thin-film transistor instability mechanisms using ambipolar transistors 51, 1094(1987). [22] Charge trapping instabilities in amorphous silicon-silicon nitride thin-film transistors 43, 597(1983). [23] Deep trapping controlled switching characteristics in amorphous silicon thin-film transistors 66, 4488 (1989) [24] A BCE-type a-Si TFT with an Island Metal Masking Structure 277 (ASID’99). [25] Transient leakage currents in amorphous silicon thin-film transistors M. Hack, H. Streemers and R. Weisfield 949 [26] AMLCD Flicker Model Considering the Vt shift in a-Si:H TFT 3, 184 (2003). [27] Plasma Treatment Effect on the Off Current Characteristics of a-Si TFT, SID (1998) [28] Investigation of the off-current in amorphous silicon thin film transistors for SiO2 and SiNx gate insulators, Jeong Hyun Kim, Woong Sik Choi, Chan Hee Hong and Hoe Sup Soh LCD R&D center, LG [29] The Effect of Plasma Treatment on the Off-Current Characteristics of a-Si TFT, S. Yamakawa, S. Yabuta, A. Ban, M. Okamoto, M. Katayama, Y. Ishii, M. Hijikigawa Sharp Corp. [30] Off Current Dependence on Fabrication Process of a Back-Channel-Etching Type a-Si TFT, Isamu Washizuka, Satoshi Yabuta, S. Yamakawa, A. Ban, M. Hijijigawa, Sharp Corp. [31] Hydrogenated amorphous silicon thin film transistor fabricated on plasma treated silicon nitride 47,367 (2000) | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38475 | - |
| dc.description.abstract | 非晶矽薄膜電晶體技術被廣泛的使用於高信賴度、高解析度、高性能以及大尺寸之主動式液晶多媒體顯示器上。閘極絕緣層在薄膜電晶體是很重要的一層薄膜,為了得到好的電性特性表現及電漿輔助化學氣相沉積產能,在下層的閘極絕緣層就必須要由氮氧化矽改為氮化矽以便成膜時能具有ㄧ致性。早期閘極絕緣層都是以使用下層為氮氧化矽加上層氮化矽為主,如此在電漿輔助化學氣相沉積成膜時會耗費較長時間及材料,如此ㄧ來產能自然就會減少費用就會提高。本論文利用田口式實驗法則去找出最適合的下閘極絕緣層,完成後再依相同法則去找到更適合應用於薄膜液晶顯示器的上閘極絕緣層之氮化矽薄膜,因為這一層往往會決定電晶體的各種特性表現;其中包括電晶體其電性表現、光學特性及物理特性等等。為求高性能及高品質液晶顯示器,電晶體的開關必須非常明確,ㄧ般電晶體開關電流比約需在10E5以上。另一方面通常會特別注意關閉時電流是否過高,這個問題可藉由有效的電漿表面處理來獲得較低的漏電流來改善薄膜液晶顯示器整體特性表現。 | zh_TW |
| dc.description.abstract | Amorphous silicon (a-Si:H) TFT technology is widely used in highly reliable, high resolution, high performance and large size active matrix liquid crystal displays (AMLCDs) that are necessary for multimedia applications. The gate insulator is important layer of TFT structure. For good electrical performance and throughput of PECVD, the bottom insulator should be changed from silicon oxygen nitride to silicon nitride. On early stages, the gate insulator was made of silicon oxy-nitride (SiON) for bottom insulator and silicon nitride (SiN) for top insulator, the longer PECVD deposition of SiON will affect the process throughput and cost even its properties of performance are better on some items, a more suitable bottom insulator was needed to improve throughput. This thesis use Takuchi analysis to find better and uniform silicon nitride film which gives rise to better TFT performance. In fact, SiNtop is main factor that property will influence TFT threshold voltage directly. In order to achieve high quality AMLCDs, it is very important to fabricate TFTs with high on-current and low off-current and the off current had better < 10-12A, efficient plasma ashing treatment on TFT can reduce leakage between drain and source. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T16:34:41Z (GMT). No. of bitstreams: 1 ntu-94-P92943013-1.pdf: 14171403 bytes, checksum: cfd93b11d776629795996c056955868d (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | Contents
Chapter 1 Introduction.………………………………1 Chapter 2 The Experiments.…………………………3 2.1 Deposition System…………………………………4 2.2 Substrate Preparation……………………………8 2.3 Deposition Procedures …………………………9 2.4 Measurement Techniques…………………………10 2.4.1 Film Thickness…………………………………10 2.4.2 Ellipsometry and Spectroscopic Ellipsom- etry ………………………………………………………10 2.4.3 Current – Voltage Characteristics…………13 Chapter 3 The use of amorphous silicon Thin Film Transistor on AMLCD ……………………………………15 3.1 Device structure of a-Si:H TFT …………………15 3.1.1 Requirement of a-Si:H TFT ……………………16 3.2 Fabrication Processes ……………………………23 3.3 Properties of the gate insulators and device performance…………………………………………………25 3.4 Optimization of Bottom SiNw……………………27 3.5 Results and Discussion……………………………38 Chapter 4 The Fabrication of amorphous Silicon Thin Film Transistor Fine tuning the gate insulator of top SiNz…………………………………………………………39 4.1 Experiments of current used conditions………52 4.2 Optimization of Top SiNz.……………………42 4.3 Results and Discussion………………………42 Chapter 5 The off current problem…………………49 5.1 Problem ………………………………………49 5.2 Experiments……………………………………50 5.3 Results and Discussion………………………51 Chapter 6 Conclusions ………………………………57 | |
| dc.language.iso | en | |
| dc.subject | 液晶顯示器 | zh_TW |
| dc.subject | TFT LCD | en |
| dc.title | SiOxNy / SiNz 閘極絕緣層特性用於薄膜液晶顯示器 | zh_TW |
| dc.title | The property of SiOxNy / SiNz Gate insulator on the performance of TFT LCD | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 93-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 胡振國(Jenn-Gwo Hwu),劉致為(Chee-Wee Liu) | |
| dc.subject.keyword | 液晶顯示器, | zh_TW |
| dc.subject.keyword | TFT LCD, | en |
| dc.relation.page | 72 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2005-07-08 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位: | 電子工程學研究所 | |
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