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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 郭正邦 | |
| dc.contributor.author | Yi-Hsun Lin | en |
| dc.contributor.author | 林義勛 | zh_TW |
| dc.date.accessioned | 2021-06-13T15:43:54Z | - |
| dc.date.available | 2011-07-07 | |
| dc.date.copyright | 2008-07-07 | |
| dc.date.issued | 2008 | |
| dc.date.submitted | 2008-07-03 | |
| dc.identifier.citation | [1] G. Scott, et. al., 'NMOS drive current reduction caused by transistor layout and trench isolation induced stress, ' December 1999 IEDM proceedings, pp.827-830.
[2] C. Diaz, et. al., 'Application-Dependent Scaling Tradeoffs and Optimization in the SoC Era', 6/02 IEEE, pp. 475-478. [3] P. Ferreira, R-A. Bianchi, F. Guyader, R. Pantel and E. Granger, 'Elimination of Stress Induced Silicon Defects in Very High-Density SRAM Structures,' presented at the 31st European Solid-State Device Research Conference, September 2001. [4] P. Fantini, G. Giuga, S. Schippers, A. Marmiroli and G. Ferrari,”Modeling of STI-induced stress phenomena in CMOS 90nm Flash technology” ESSDERC 2004, 401- 404 [5] A.T. Bradley et al., “Piezoresistive Characteristics of Short-Channel MOSFETs on (100) Silicon“ IEEE Trans. Electron Dev., 48, 9, p. 2009, (2001). [6] Yi-Ming Sheu, Sheng-Jier Yang, Chih-Chiang Wang, Chih-Sheng Chang, Li-Ping Huang, Tsung-Yi Huang,Modeling Mechanical Stress Effect on Dopant Diffusion in Scaled MOSFETs. IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 52, NO. 1, JANUARY 2005 [7] Gallon C, Reimbold G, Ghibaudo G, Bianchi RA, Gwoziecki R, Orain S, Robilliart E, Raynaud C, Dansas H, Electrical analysis of mechanical stress induced by STI in short MOSFET using externally applied stress. IEEE Trans Elec Dev 2004;51:8, 1254-1261. [8] Bianchi RA, Bouche G., Roux-dit-Buisson O, Accurate modeling of trench isolation induced mechanical stress effects on MOSFET electrical performance. IEDM Dig 2002; p.117-120. [9] Hamada A, Furusawa T, Saito N, Takeda E, A new aspect of mechanical stress effects in scaled MOS devices. IEEE Trans Elec Dev 1991;38:4, 895-900. [10] Kuo JB, Low-voltage SOI CMOS VLSI devices and circuits. New York:Wiley; 2001. [11] Lin SC, Kuo JB, Temperature-dependent kink effect model for partiallydepleted SOI NMOS devices. IEEE Trans Elec Dev 1999;46:1, 254-258. [12] Lin IS, Su VC, Kuo JB, Chen D, Yeh CS, Tsai CZ, Ma M, STI-induced mechanical stress-related kink effect of 40nm PD SOI NMOS devices. EUROSOI 2008; 81-82. [13] Kuo JB, Lin I, Su V, Ma M, Tsai C, Yeh CS, Chen D, STI Mechanical-stress induced subthreshold kink effect of 40nm PD SOI NMOS device. ISDRS 2007;1-2. [14] Lin I, Su V, Kuo J, Lee R, Lin G, Chen D, Yeh C, Tsai C, Ma M, Influence of STI-Induced mechanical stress in kink effect of 65nm PD SOI CMOS devices. EDSSC 2007; 107-108. [15] Taurus TSUPREM-4 user guide. Synopsys: 2005. [16] Taurus Medici user guide. Synopsys; 2005. 1999;46:1, 254-258. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/37789 | - |
| dc.description.abstract | 這篇論文探討由於淺溝槽隔離(STI)所造成的機械張力相關四十奈米部分解離絕緣體上矽N型金氧半元件(40nm PD SOI NMOS)之電流突增（kink）現象。
由實驗量測數據及2D模擬結果可驗證得到四十奈米部分解離絕緣體上矽金氧半元件中，相較於較大射級/汲級長度（S/D length）為1.7μm 的元件，較小射級/汲級長度（S/D length）為0.17μm 的元件由於受到淺溝槽隔離(STI)所造成的較大機械張力所導致其寄生雙載子電晶體(parasitic bipolar)的基極－射極(Body-Source)有較高的能帶縮減(bandgap narrowing)效應，使得其元件操作在飽和區(Saturation rigon)時之電流突增現象(kink)，會在較高的汲極電壓發生，然而在高電場時靠近汲極的能帶縮減(bandgap narrowing)效應會幫助撞擊游離(Impact Ionization)效應而產生補償效果。 | zh_TW |
| dc.description.abstract | This thesis reports the STI-induced mechanical stress-related kink effect behaviour of the 40nm PD SOI NMOS device. As verified by the experimentally measured data and the 2D simulation results, the kink effect behaviour in the saturation region occurs at a higher VD for the 40nm PD device with a smaller S/D length of 0.17μm as compared to the one with the S/D length of 1.7μm due to the higher body-source bandgap narrowing effect on the parasitic bipolar device from the higher STI-induced mechanical stress, offset by the impact ionization enhanced by the bandgap narrowing in the high electric field region near the drain. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T15:43:54Z (GMT). No. of bitstreams: 1 ntu-97-R95943150-1.pdf: 1285857 bytes, checksum: 00c04240e37810adb2a87c50d5583e0c (MD5) Previous issue date: 2008 | en |
| dc.description.tableofcontents | 第一章 導論………………………………………………………………………………11
1.1 PD SOI CMOS元件之縮小…………………………………………………………………11 1.2 STI結構之重要…………………………………………………………………………12 第二章 機械張力效應…………………………………………………………………………17 2.1 STI造成之機械張力……………………………………………………………………17 2.2 機械張力對元件特性造成之影響………………………………………………………21 第三章 電流突增現象………………………………………………………………………24 3.1汲極電流對應汲極電壓…………………………………………………………………24 3.2 電導對應汲極電壓………………………………………………………………………26 3.3 基極-射極電壓(VBE)對應汲極電壓……………………………………………………28 第四章 次臨界區電流突增現象………………………………………………………………35 第五章 結論……………………………………………………………………………………39 參考文獻……………………………………………………………………………………………41 | |
| dc.language.iso | zh-TW | |
| dc.title | 分析淺溝槽隔離所造成機械張力對奈米部分解離絕緣體上矽金氧半之電流突增現象之影響 | zh_TW |
| dc.title | Analysis of STI-Induced Mechanical Stress-Related Kink Effects For Nanometer PD SOI CMOS Devices | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 96-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 蔡成宗,陳正雄,林浩雄,林吉聰 | |
| dc.subject.keyword | 電流突增,機械壓力, | zh_TW |
| dc.subject.keyword | kink,mechanical stress, | en |
| dc.relation.page | 42 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2008-07-03 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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