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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 胡振國(Jenn-Gwo Hwu) | |
| dc.contributor.author | Chien-Yu Liu | en |
| dc.contributor.author | 劉建語 | zh_TW |
| dc.date.accessioned | 2021-06-13T15:40:57Z | - |
| dc.date.available | 2010-07-09 | |
| dc.date.copyright | 2008-07-09 | |
| dc.date.issued | 2008 | |
| dc.date.submitted | 2008-07-07 | |
| dc.identifier.citation | Reference
[1] International Technology Roadmap for Semiconductors, 2008 Update Semiconductor Industry Association. [2] J.K. Yang and C.Hu, “MOS capacitance measurements for high-leakage thin dielectrics,” IEEE Trans. On Electron Device, vol.46, no.7, July, 1999. [3] Yang, K.; Ya-Chin King; Chenming Hu; “Quantum effect in oxide thickness determination from capacitance measurement.” VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on 14-16 June 1999 Page(s): 77-88. [4] Berkley Device Group.[Online].Available: www.device.eecs.berkley.edu/qmcv/html. [5] J. C. Gelpey, P. O. Stump, and J. W. Smiith, “Process Control for a Rapid Optical Annealing System,” Mat.Res.Soc. Symp. Proc, vol.52,p199,1986. [6] J. Nulman, “In-situ processing of silicon dielectrics by rapid thermal processing : cleaning, growth, and annealing, ” Mat.Res.Soc. Symp. Proc, vol.92,p.141,1987. [7] Hamada, A.; Furusawa, T.;Saito, N.; Takeda, E.; “A new aspect of mechanical stress effects in scaled MOS devices,” Electron Devices, IEEE transactions on Volume 38, Issue 4, April 1991 Page(s):895-900. [8] Gallon,C.; Reimbold, G.; Dansas, H.; “Electrical analysis of mechanical stress induced by STI in short MOSFETs using externally applied stress, Electron Devices, ” IEEE Transactions on Volume 51, Issue 8, Aug. 2004 Page(s):1254-1261. [9] Ashcroft and Mermin, Solid state physics, pp. 32-38(Harcort, 1975). [10] Chin-Hung Tseng, “Germanium channel MOSFETs and strain-induced effects on Silicon MOS Capacitor”, p69. [11] R. Moazzami and C. Hu, “Stress-Induced Leakage Current in Thin Silicon Dioxide Fims”, IEDM Technical Digest, pp. 139-142, 1992. [12] D. J. Dimaria and E. Cartier, “Mechanism for Stress-Induced Leakage Current in Thin Silicon Dioxide Films ”, Journal of applied Physics, Vol. 78, No.6, pp.3883-3894, 1995. [13] K. Lai W. Chen, M. Hao, J. Lee, M. Gardner, and J. Fulford, “Turn-around effect of stress-induced leakage current of ultra-thin N2 O-annealed oxides”, Appl. Phys. Lett. 67, pp.673-675, 1995. [14] Tomasz Brozek, Eric B. Lum, and Chand R. Viswanathan; “oxide thickness dependence of hole trap generation in MOS structures under high-field electron injection,” Microelectronic Engineering 36 (1997) 161-164. [15 ] B.J.Mrstik, V.V.Afanas’ev, A. stesmans, and P.J.McMarr;”Relationship between hole trapping and oxide density in thermally grown SiO2,” Microelectronic Engineering 45 (1999) 143-146. [16] DiMaria, D.J.;”Hole trapping, substrate currents, and breakdowm in thin silicon dioxide films [in FETs]” Electron Device Letters, IEEE, Volume16, Issue 5, May 1995 Page(s):184-186. [17] Apte, p.p.; Sarawat, K.C.; “Correlation of trap generation to charge-to-breakdown (Qbd): aphysical-damage model of dielectric b reakdown,” Electron Devices, IEEE Transactions on Volume 41, Issue 9, Sept. 1994 Page(s):1595-1602. [18] S. W. Huang and J. G. Hwu, “Electrical Characterization and Process Control of Cost Effective High-k Aluminum Oxide Gate Dielectrics Prepared by Anodization Followed by Furnace Annealing,” IEEE Transactions on Electron Devices, Vol.50, No.7,, PP.1658-1664, Jul. 2003. [19] Zhi-Hao Chen, Szu-wei Huang, Jenn-Gwo Hwu; “Electrical characteristics of ultra-thin gate oxides (<3 nm) prepared by direct current superimposed with alternating-current anodization,” Solid-State Electronics 48 (2004) 23-28. [20 ] Wei Jian Liao, Yi-Lin Yang, Shun-Cheng Chuang, and Jenn-Gwo Hwu;”Growth-then-anodization technique for reliable ultrathin gate oxides, ” Journal of the electrochemical society, 151 (9) G549-G553 (2004). [21] Degrave, R., et al., A consistent model for the thickness dependence of intrinsic breakdown in ultra-thin oxides. in IEDM. 1995. P.863. [22] Harari, E., Dielectric breakdowm in electrical stressed thin films of thermal SiO2 . J.Appl. Phys., 1978. 49(4): p. 2478. [23] Ricco’, B., M.Y. Azbel, and M.H. Brodsky, Novel Mechanism for Tunneling and Breakdown of Thin SiO2 Films. Phys. Rev. Lett., 1983. 51(19): p.1795. [24] Nissan-Cohen, Y., J. Shappir, and D. Forhman-Bentchkowsky, Trap generation and occupation dynamics in SiO2 under charge injection stress. J. Appl. Phys.,1986. 60(6): p.2024. [25] Suňé, J., et al., On the breakdown statistics of very thin SiO2 films. Thin Solid Film, 1990. 185: p.347 [26 ] W. C. Lee and Chenming Hu, “Modeling gate and substrate currents due to conduction and valence-band electron and hole tunneling,” in Proc. Symp. VLSI Technology, Dig. Tech. Papers, June 2000, pp. 198-199. [27] M. Y. Doghish and F. D. Ho, “A Comprehensive Analytical Model for Metal-Insulator-Semiconduction (MIS) Devices,” IEEE Trans. Electron Device, vol. 39, no. 12, pp. 2771-2778, 1992. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/37733 | - |
| dc.description.abstract | 當金氧半元件尺寸縮小以達到高效能表現時，矽氧化層的厚度也隨之變薄。此外，為了達到更高的製程掌握度，超薄熱成長氧化層製程的溫度條件必須控制在較低溫環境，這些趨勢也因此導致元件漏電流的增加以及不穩定性。由於漏電流的增加將降低元件電特性的品質，而矽氧化層的可靠度也將影響元件的運作穩定性，在本篇論文中提出一個在快速熱成長氧化過程中施加應力於矽晶圓使之彎曲的技術，用以改善二氧化矽做為超薄閘極氧化層的品質及可靠度。
在第一章中，我們介紹金氧半電容元件的分析原理和此研究的實驗設置以及計算出施加在實驗中的機械應力大小。接著，在第二章中，經由分析樣品的電容與電壓，電流與電壓的關係圖去探討不同應力條件下成長的p型金氧半電容元件的詳細電特性，包含平帶電壓偏移，漏電流，及氧化層生長機制等各種特性的不同。實驗結果顯示出經由在快速熱成長過程中施加機械伸張應力於矽基板可以產生高品質的矽氧化層。第三章中，我們對氧化層成長過程中施加伸張應力的元件去測試它們的可靠度，包括TDDB以及SILC。經由這些測試，我們發現金氧半元件的快速熱成長氧化層在成長過程中施加伸張應力可展現較佳的可靠度。最後，我們針對這篇論文給予結論及未來研究方向。 | zh_TW |
| dc.description.abstract | As MOS devices are scaled down to achieve high performance, the thicknesses of silicon dioxides are also scaled down. Besides, the growth temperature of thermal ultra-thin oxides is reduced to obtain better control. This trend results in gate leakage current increasing and unreliability. And the gate leakage current increasing would degrade devices’ electrical characteristics, the unreliability of oxides may make devices unstable in operation. In this thesis, a technique to improve the quality and reliability of SiO2 as ultra-thin gate dielectrics by bending the silicon wafer during rapid thermal oxidation is proposed.
In Chapter 1, we introduce analysis models of MOS capacitors and experiment setup in this study, and calculate the strength of mechanical stress applied in this work. Then, in Chapter 2, the detailed electrical characteristics of MOS (p) structures with various oxidation processes are analyzed through C-V curves and I-V curves of samples. The different characteristics of MOS (p) structures, including flat-band voltage shift, leakage current, and oxide growth kinetics are found in this work. The experimental results show that the quality of oxides prepared by rapid thermal process can be improved by oxidation with mechanical tensile stress applied on silicon substrate. In Chapter 3, the reliability properties of tensile-stress MOS (p) samples, including time dependent dielectric breakdown (TDDB) and stress induced leakage current (SILC) are examined. After the test, it is found that the tensile-stress MOS (p) samples in the SILC and TDDB test maintain better quality in term of reliability than non-stress MOS (p) samples. In the last chapter, a conclusion and suggestions for future work are given. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T15:40:57Z (GMT). No. of bitstreams: 1 ntu-97-R95943135-1.pdf: 913993 bytes, checksum: 67bafb8cf2692ce35d524d0cb8e9dbc0 (MD5) Previous issue date: 2008 | en |
| dc.description.tableofcontents | Contents
Abstract(Chinese)………………………………I Abstract(English)………………………………II Contents…………………………………………V Figure Captions…………………………………VII Chapter1 Introduction………………………1 1-1 Motivation……………………………1 1-2 Analysis Models of MOS Capacitors…………3 1-3 Rapid Thermal Processing System and Measurement System…………………………………………………………6 1-4 Experimental Setup and Mechanical Stress Calculating….………………………………………7 Chapter2 Characteristics of MOS Capacitors with Oxides Prepared by Strain-Oxidation……………………………………………………15 2-1 Introduction…………………………………………16 2-2 Device Characteristics……………………………16 2-2-1 C-V&I-V Curves of Non-Stress Samples....16 2-2-2 C-V&I-V Curves of Strain-Oxidation Samples17 2-2-3 Flat-Band Voltage Shift…………………20 2-2-4 Leakage Current Comparisons……………21 2-2-5 Oxide Growth Kinetics…………………22 2-2-6 Characteristics under Different Temperatures……………………………………………………24 2-3 Summary……………………………………………………29 Chapter3 Reliability of MOS Capacitors Prepared by Strain-Oxidation………………………………………………………52 3-1 Introduction…………………………………………52 3-2 Reliability…………………………………………53 3-2-1 SILC Reliability………………………………………………53 3-2-2 TDDB Reliability ………………55 3-4 Summary…………………………………………59 Chapter4 Conclusion and Suggestion for Future Work………………………………………72 4-1 Conclusion…………………………72 4-2 Suggestion for Future Work………73 References……………………………………………75 | |
| dc.language.iso | zh-TW | |
| dc.subject | 伸張應力:快速熱成長:薄閘極氧化層:金氧半電容 | zh_TW |
| dc.subject | Tensile stress:MOS Capacitor:Rapid Thermal Ultra-thin Gate Oxides | en |
| dc.title | 伸張應力對快速熱成長超薄閘極氧化層金氧半電容元件之效應 | zh_TW |
| dc.title | Effect of Tensile-stress on MOS Capacitors with Rapid Thermal Ultra-Thin Gate Oxides | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 96-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 王維新(Way-Seen Wang),洪志旺(Jyh-Wong Hong),鄭晃忠(Huang-Chung Cheng) | |
| dc.subject.keyword | 伸張應力:快速熱成長:薄閘極氧化層:金氧半電容, | zh_TW |
| dc.subject.keyword | Tensile stress:MOS Capacitor:Rapid Thermal Ultra-thin Gate Oxides, | en |
| dc.relation.page | 77 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2008-07-07 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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