應用於IEEE 802.3a.e.之3.125Gbps乙太網路傳送機

Abstract

光通訊系統在局部區域網路(LAN)中變得愈來愈重要。在此系統中，10GBase -LX4在降低成本與提昇傳輸速率都有很好的表現，所以將在低成本通訊上扮演很重要的角色。10GBase-LX4的架構是由四條通道組成，每一條通道需要傳輸3.125Gb/s的資料，經過8B/10B編碼器，最後輸出一條10Gb/s的資料流。這篇論文在介紹一個通道中的電路設計，並且完成一個適用於10GBase-LX4規格的3.125Gb/s乙太網路傳送機。 一個乙太網路傳送機包含了一個序列串列轉換器、一個雷射驅動器與一個雷射。透過序列串列轉換器，平行的資料被轉換成一條串列的資料流。為了達到高速傳輸與低電路複雜性，架構上使用平移暫存器與樹狀多工器並用的方式。此外，為了實現此種架構，將以20%工作週期時脈產生器提供切換傳輸路徑所需時脈。雷射驅動器將資料流的波形特性最佳化，並且提供適當的調變電流給雷射。因為資料傳送經過序列串列轉換器會產生波形寬度的失真，所以雷射驅動器需要控制波形寬度，並且希望使用低複雜性的電路達到高傳輸速率下的波形寬度控制；針對雷射的特性，太陡的波形會造成輸出中有額外的阻尼振盪，影響傳輸品質，所以雷射驅動器將上升速率控制在一適當範圍。之前的作法是使上升速率與偏壓電流成正比，然而雷射驅動器要提供很大的調變電流，這會使電晶體尺寸被大大增加，並且增加消耗功率。所以，控制時需要轉換為上升速率與電壓成正比來控制。最後，為了達到輸出阻抗匹配，阻抗控制迴路可自動校正輸出電阻。 雷射驅動器已由0.18微米CMOS製程實現。波形寬度與上升速率的控制範圍分別為35%~65%與1.52V/ns~1.83V/ns。阻抗控制迴路可使電阻變易範圍在+/-2.5%之內。在供應電壓是1.8伏下消耗功率是110毫瓦。量測的峰對峰抖動是40ps。

Optical communication systems become more and more important in LAN. In this application, 10GBase-LX4 has good performances at low cost and high data rate. It will play an important role in the low cost data communications. The architecture of 10GBase-LX4 is composed of four lanes. One of lanes is required to transmit data with the rate of 3.125-Gb/s. Through 8B/10B encoders, the system generates a 10-Gb/s data stream finally. This thesis will introduce circuit designs in the lane and how to complete a 3.125-Gb/s Ethernet transmitter which achieves the specification of 10GBase-LX4. A transmitter includes a serializer, a laser driver, and a laser. Through the serializer, parallel data are transformed into a serial data stream. To achieve high data rate and low circuit complexity, the architecture combines shift register and tree-type MUX. In additional, a 20% duty-cycle clock generator provides the clock for switching transmitting paths to realize this architecture. The laser driver optimizes the characteristics of data streams and provides the adequate modulation current to the laser. The pulsewidth of data will be distorted because of the nonlinear channel. The laser driver controls the pulsewidth, and achieves low circuit complexity in high speed communication. For a laser’s characteristic, a waveform with short rising/ falling times causes a damping output of the laser, and it will affect transmitting quality. Hence, the laser keeps the slew-rate within a moderate range. Previous works make the slew-rate proportional to the bias current. However, laser driver needs to provide large modulation current. This methodology enlarges transistors’ size and increase the power consumption. Therefore, the proposed controller makes the slew-rate proportional to the voltage. Finally, an impedance-controlled loop corrects the output resistance automatically to achieve output impedance matching. The laser driver is realized in a standard 0.18-μm CMOS technology. The tuning ranges of the pulsewidth and the slew-rate are 35%~65% and 1.52V/ns~1.83V/ns individually. Impedance-controlled loop achieves the resistance variation within +/-2.5%. The power consumption is 110-mW power with 1.8-V supply voltage. The measured peak-to-peak jitter is 40ps.