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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 胡振國(Jenn-Gwo Hwu) | |
| dc.contributor.author | Chia-Nan Lin | en |
| dc.contributor.author | 林佳男 | zh_TW |
| dc.date.accessioned | 2021-06-13T05:52:48Z | - |
| dc.date.available | 2006-07-10 | |
| dc.date.copyright | 2006-07-10 | |
| dc.date.issued | 2006 | |
| dc.date.submitted | 2006-07-03 | |
| dc.identifier.citation | [1] International Technology Roadmap for Semiconductor, 2004 Update Semiconductor Industry Association.
[2] Zhu, N.; Van Wyk, J.D.; Liang, Z.X., “Thermal-mechanical stress analysis in embedded power modules, ” Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual, Volume 6, 20-25 June 2004 Page(s):4503 - 4508 Vol.6. [3] C. H Choi, Y. Wu, J. S. Goo, Z. Yu, and R. W. Dutton, “ Capacitance reconstruction from measured C-V in high leakage, nitride/oxide, MOS,” IEEE Trans. Electron Devices, vol.47, pp.1843-1850, 2000. [4] K. J. Yang and C. Hu, “ MOS capacitance measurements for high-leakage thin dielectrics,” ” IEEE Trans. on Electron Device, vol.46,no.7, July, 1999. [5] R. Rios et al, Tech. Dig. Int. Electron Devices Meet., pp.937-940,1995. [6] Yang, K.; Ya-Chin King; Chenming Hu; “Quantum effect in oxide thickness determination from capacitance measurement,” VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on14-16 June 1999 Page(s):77 – 78. [7] Berkeley Device Group. [Online]. Available: www.device.eecs.berkeley. edu/qmcv/html [8] Hamada, A.; Furusawa, T.; Saito, N.; Takeda, E.; “A new aspect of mechanical stress effects in scaled MOS devices,” Electron Devices, IEEE Transactions on Volume 38, Issue 4, April 1991 Page(s):895 – 900. [9] Gallon, C.; Reimbold, G.; Ghibaudo, G.; Bianchi, R.A.; Gwoziecki, R.; Orain, S.; Robilliart, E.; Raynaud, C.; Dansas, H.; “Electrical analysis of mechanical stress induced by STI in short MOSFETs using externally applied stress, Electron Devices,” IEEE Transactions on Volume 51, Issue 8, Aug. 2004 Page(s):1254 – 1261. [10] Rim, K.; Hoyt, J.L.; Gibbons, J.F.; “Fabrication and analysis of deep submicron strained-Si n-MOSFET's, Electron Devices,” IEEE Transactions on Volume 47, Issue 7, July 2000 Page(s):1406 – 1415. [11] Nayak, D.K.; Goto, K.; Yutani, A.; Murota, J.; Shiraki, Y.; “High-mobility strained-Si PMOSFET's,” Electron Devices, IEEE Transactions on Volume 43, Issue 10, Oct. 1996 Page(s):1709 – 1716. [12] Sugii, N.; Hisamoto, D.; Washio, K.; Yokoyama, N.; Kimura, S.; “Performance enhancement of strained-Si MOSFETs fabricated on a chemical-mechanical-polished SiGe substrate,” Electron Devices, IEEE Transactions on Volume 49, Issue 12, Dec. 2002 Page(s):2237 – 2243. [13] Maikap, S.; Yu, C.-Y.; Jan, S.-R.; Lee, M.H.; Liu, C.W.; “Mechanically strained strained-Si NMOSFETs,” Electron Device Letters, IEEE, Volume 25, Issue 1, Jan. 2004 Page(s):40 – 42. [14] Tung-Sheng Chen; Yu-Ren Huang; “Evaluation of MOS devices as mechanical stress sensors, Components and Packaging Technologies,” IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part A: Packaging Technologies, IEEE Transactions on] Volume 25, Issue 3, Sept. 2002 Page(s):511 – 517. [15] E. H. Nicollian and J. R. Brew, “MOS (Metal Oxide Semiconductor) Physics and Technology,” John Wiley & Sons, 1982. [16] Mohamed Yehya Doghish and Fat Duen Ho, “A comprehensive Analytical Model for Metal-Insulator-Semiconductor (MIS) Devices,” IEEE Trans. Semiconductor. Manufact., vol. 39, No. 12, p.2771, 1992. [17] 施敏；半導體物理與製程技術 Second Edition，2002 [18] Sedra/Smith, Microelectrionic Circuits Fourth Edition, 1998 [19] Kevin J. Yang and Cheming Hu, “MOS capacitance Measurements for High-Leakage Thin Dielectric,” IEEE Trans. Electron Devices, pp.1500, 1999. [20] Kevin Yang, Ya-Chin King, and Cheming Hu, “Quantum Effect in Oxide Thickness Determination From Capacitance Measurement,” 1999 Symposium on VLSI Technology, Digest of Technical Paper, pp. 77, 1999. [21] Rosenbaum, E.; Register, L.F.; “Mechanism of stress-induced leakage current in MOS capacitors,” Electron Devices, IEEE Transactions on Volume 44, Issue 2, Feb. 1997 Page(s):317 – 323. [23] Tomasz Brozek, Eric B. Lum, and Chand R. Viswanathan; “Oxide thickness dependence of hole trap generation in MOS structures under high-field electron injection,” Microelectronic Energineering 36 (1997) 161-164. [24] B.J.Mrstik, V.V. Afanas’ev, A. Stesmans, and P.J. McMarr; “Relationship between hole trapping and oxide density in thermally grown SiO2,” Microelectronic Energineering 48 (1999) 143-146. [25] DiMaria, D.J.; “Hole trapping, substrate currents, and breakdown in thin silicon dioxide films [in FETs ]“ Electron Device Letters, IEEE, Volume 16, Issue 5, May 1995 Page(s):184 – 186. [26] Apte, P.P.; Saraswat, K.C.; “Correlation of trap generation to charge-to-breakdown (Qbd ): a physical-damage model of dielectric breakdown,” Electron Devices, IEEE Transactions on Volume 41, Issue 9, Sept. 1994 Page(s):1595 – 1602. [27] Szu-Wei Huang; Jenn-Gwo Hwu; “Electrical characterization and process control of cost-effective high-k aluminum oxide gate dielectrics prepared by anodization followed by furnace annealing,” Electron Devices, IEEE Transactions on Volume 50, Issue 7, July 2003 Page(s):1658 – 1664. [28] Zhi-Hao Chen, Szu-Wei Huang, Jenn-Gwo Hwu; “Electrical characteristics of ultra-thin gate oxides (<3 nm) prepared by direct current superimposed with alternating-current anodization, “Solid-State Electronics 48 (2004) 23-28. [29] Wei-Jian Liao, Yi-Lin Yang, Shun-Cheng Chuang, and Jenn-Gwo Hwu; “Growth-then-anodization technique for reliable ultrathin gate oxides, “ Journal of the electrochemical society, 151 (9) G549-G553 (2004). | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/34053 | - |
| dc.description.abstract | 當金氧半元件縮小至深次微米區域，矽氧化層的厚度也隨之變薄。根據ITRS的預測，在2013年時，元件的等效氧化層厚度將會是0.6nm，雖然縮小化與增加功率密度在現今的電子系統是一種趨勢，但是熱效應的問題是要被考慮的。當晶片經過封裝後，它常常會受到跟封裝有關的應力影響。許多元件大都是因為在高溫操作下受到熱效應與機械應力的施壓而壞掉。在這篇論文，我們將致力研究於經過熱效應與機械應力的施壓後的氧化層穩定度，而且，當金氧半元件在經過承受不同的機械應力同時在升溫的環境後，我們將分析它的電子特性與穩定度。
在第二章中，我們研究金氧半元件在經過承受不同的機械應力同時在攝氏100度的環境加熱5分鐘後的電特性。當中有探討關於對拉伸溫度(tensile-temperature)的樣品去改變烘烤元件時間或改變施加應力的強度的詳細電特性。而實驗結果顯示出金氧半元件經過長時間的拉伸溫度施壓(tensile-temperature stress)或承受適合的拉伸應力可以展現最好的介面品質。 在第三章，我們對所有經過形變溫度施壓的元件去測試它們的穩定度，包括TDDB和SILC。經過這些測試，我們知道金氧半元件經過長時間的拉伸溫度施壓(tensile-temperature stress)或承受適合的拉伸應力可以展現改善的崩潰忍受度以及變化少的SILC。最後，我們對這篇論文給予結論和建議未來的研究方向。 | zh_TW |
| dc.description.abstract | As MOS devices are scaled down to the deep-submicrometer region, the thickness of silicon oxide also scales down. Based on the International Technology Roadmap for Semiconductor (ITRS), the equivalent oxide thickness (EOT) should be 0.6 nm in 2013. Although miniaturization and increasing power density are the trends in modern electronic system, the issue of thermal stress is of concern. After packing up in system, chips often suffer from the package-related stress. Many device failures are caused by the thermal-mechanical stress occurs during high temperature operations. In this thesis, we will focus on the effect of thermal-mechanical stress on oxide reliability. We will analyze the electrical characteristics and reliability of the MOS structure after receiving various mechanical stresses under an elevated temperature.
In chapter 2, we studied the electrical characteristics of MOS structures after receiving thermal treatments at 100 oC for 5 minutes with various mechanical stresses applied on the substrate. The detailed electrical characteristics on tensile-temperature samples by changing the baking time and the strength of mechanical stress are investigated. The experimental result shows the samples after long-time tensile-temperature stress and under suitable tensile stress have the best interface quality. In chapter 3, the reliability properties of the strain-temperature samples, including time-dependent-dielectric-breakdown (TDDB) and the stress-induced-leakage current (SILC) are examined. After these tests, we find that the samples after long-time tensile-temperature stress and suitable tensile stress exhibit the improved breakdown endurance and the reduced SILC. Finally, conclusions and some other suggestions about this thesis were given. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T05:52:48Z (GMT). No. of bitstreams: 1 ntu-95-R93943134-1.pdf: 1323627 bytes, checksum: eb274f4528f930275cb5bbbbc34e3d1d (MD5) Previous issue date: 2006 | en |
| dc.description.tableofcontents | Chapter1 Introduction………………………………………1
1-1 Motivation of This Work……………………………...…1 1-2 Determination of the Ultra-thin Gate Oxide Thickness by Quantum Mechanical Fitting……………………………...2 1-3 Rapid Thermal Processing System and Measurement System……………………………………………..........……4 1-4 Experimental Setup of Strain-Temperature stress……............................................5 Chapter2 Characteristics of MOS (P) Capacitors under Strain-Temperature Stressing…………………...........12 2-1 Introduction to saturation gate current for MOS capacitor biased in deep depletion…………..………….12 2-2 Experimental…………………………………....……….15 2-3 Result and Discussion…………………………..………16 2-3-1 Current-voltage (I-V) characteristics of strain-temperature samples…………....................………16 2-3-2 Current-voltage (I-V) characteristics of samples after various tensile-temperature treatments….......18 2-4 Summary……………………………………......…………19 Chapter3 Reliability of MOS (P) Capacitors after Strain-Temperature Stressing…………….................…….31 3-1Introduction……………………………………..………..31 3-2 Result and Discussion…………………………………..32 3-2-1 TDDB Reliability of MOS(P) capacitors after strain-temperature stressing………...................……….32 3-2-2 SILC Reliability of MOS(P) capacitors after strain-temperature stressing…………..................……..36 3-3 Summary…………………………………….....………….38 Chapter4 Conclusion and Suggestions for Future Work..60 4-1 Conclusion…………………………………………….…..60 4-2 Suggestions for future work…………………..………61 References……………………..……………………………….63 | |
| dc.language.iso | en | |
| dc.title | 形變溫度施壓對超薄閘極氧化層金氧半元件之效應 | zh_TW |
| dc.title | Effects of Strain-Temperature Stress on MOS Capacitors with Ultra-thin Gate Oxides | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 94-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 洪志旺,王維新,鄭晃忠 | |
| dc.subject.keyword | 形變溫度, | zh_TW |
| dc.subject.keyword | strain-temperature, | en |
| dc.relation.page | 66 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2006-07-04 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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