以集總元件為匹配架構之良率分析與應用於Q頻段之CMOS平衡式放大器研製

Abstract

當大量生產時，良率是一個十分重要的考量要素，而製造良率的提升也意味著生產成本的降低。對於射頻電路而言，匹配網路是一個影響電路效能的重要關鍵，而匹配網路會對良率帶來巨大的影響已被證實[8]。然而，僅靠匹配電路架構的選擇無法確保高良率的設計。 本論文的第一個部份著眼於兩階無損耗集總元件的匹配網路之良率分析。我們使用蒙地卡羅方法畫出每一種匹配架構於史密斯圖上的良率分佈，這些結果給電路設計者一個導引去選擇匹配網路。此外，我們提出了一個以計算史密斯圖上匹配路徑長度的方法來估計良率，這使得設計者可以在電路設計之初時加入良率的考量。 第二部份我們設計了一顆應用於Q頻段的平衡式放大器，而此放大器使用標準90奈米CMOS(金氧半互補式)製程。平衡式放大器擁有絕佳的輸入及輸出回返損耗(return loss)，以良率的觀點看來是一種良好的電路架構。量測結果顯示此放大器在Q頻段有非常寬頻的增益響應和良好的輸入/輸出回返損耗。同時，其中的單端放大器良測結果顯示其擁有極平坦且寬頻的增益響應及不錯的輸出功率。藉著使用薄膜微帶線(thin-film microstrip)的技術，這兩個放大器大幅的縮小了晶片面積。就我們目前所知，這是第一顆以標準CMOS製程所設計的平衡式放大器，而這也展示了CMOS製程可適用於毫米波元件設計的能力。

Yield is an essential consideration while volume production and the improvement of fabrication yield means that the production cost can be reduced. For radio frequency (RF) circuits, matching network is the key of circuit performance, and it has been proved that the matching network has strong relationship with yield [8]. However, only selecting matching topology cannot guarantee a high-yield design. The first part of this thesis is focused on the yield analysis of two-element-lossless- lumped matching networks. We use the Monte Carlo method to plot the yield distributions in Smith chart for each matching topology. These provide the circuit designer a guideline to select matching network. Moreover, we propose a method to estimate yield from the calculation of matching path length in Smith chart. By this approach, the designer can choose the matching points with yield consideration at the initial design stage. The second part is a Q-band balanced amplifier design with the standard bulk 90-nm CMOS process. Balanced amplifier has excellent input and output return losses, and it is a good structure from the perspective of yield. The measured results show this balanced amplifier has a very broadband gain response and good return losses at Q-band. A single-ended amplifier is fabricated as well for verification, and it shows a very flat and broadband gain response with reasonable output power. With the thin-film microstrip technique, both amplifiers have very compact sizes. To our best knowledge, this is the first balanced amplifier employing the standard bulk CMOS technology. Our work shows that the standard bulk CMOS process is another candidate for MMW bands front-end component design.