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DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 林祐生 | |
dc.contributor.author | Chun-Yi Lu | en |
dc.contributor.author | 呂俊億 | zh_TW |
dc.date.accessioned | 2021-06-13T04:11:16Z | - |
dc.date.available | 2006-07-27 | |
dc.date.copyright | 2006-07-27 | |
dc.date.issued | 2006 | |
dc.date.submitted | 2006-07-25 | |
dc.identifier.citation | [1] D. M. Pozar, Microwave Engineer, Addison Wesley Publishing Company Inc., 1990.
[2] R. E. Collin, Field Theory of Guided Waves, second edition., IEEE press, 1990. [3] J.S.Hong and M.J.Lancaster, Microstrip Filters for RF/Microwave Applications, John Wiley & Sons, Inc.2001. [4] K.C.Gupta, R.garg, I.BAhl, and P. Bhartia, Microstrip Lines and Slotlines. London:Artech House, 1996. [5] S. Ramo, J. R.Whinnery, T. Van Duzer, Fields And Waves In Communication Electronics , third edition. John Wiley & Sons, Inc.1993. [6] H. J. Riblet, “A general theorem on an optimum stepped impedance transformer,” IRE Trans. Microwave Theory Tech. , pp.169-170, Mar. 1960. [7] H. J. Hindin, J. J. Taub, “On the design of stepped transmission-line transformers,” IEEE Trans. Microwave Theory Tech. pp.528-529, Sept. 1967. [8] H. Kamitsuna, H. Ogawa, “Novel slow-wave meander lines using multilayer MMIC technologies,” IEEE Microwave Guide Waves letters, vol 2, pp.1194-1201, Jan. 1992 [9] G. W. Hughes, R. M. White, “Microwave properties of nonlinear MIS and Schottky-barrier microstrip,” IEEE Trans. Electron Devices, vol. ED-22, pp. 945–946, Oct. 1975. [10] D. Jäger, “Slow-wave propagation along variable Schottky-contact microstrip line,” IEEE Trans. Microwave Theory Tech., vol. MTT-24, pp. 566–573, Sept. 1976. [11] H. Hasegawa, H. Okizaki, “M.I.S. and Schottky slow-wave coplanar striplines on GaAs substrates,” Electron. Lett., vol. 13, pp. 663–664, 1977. [12] H. Ogawa, T. Itoh, “Slow-wave characteristics of ferromagnetic semiconductor microstrip line,” IEEE Trans. Microwave Theory Tech., vol. MTT-34, pp. 1478–1482, Dec. 1986. [13] C. Caloz, C.C. Chang, Y. Qian,T. ltoh, “A Novel Multilayer Photonic Band-Gap (PBG) Structure for Microstrip Circuits and Antennas,” IEEE Antennas and propagation society international symposium, vol. 2, pp.498 – 501, July 2001. [14] F. R. Yang, K. P. Ma, Y. Qian, and T. Itoh, “A uniplanar compact photonic- bandgap (UC-PBG) structure and its applications for microwave circuits,” IEEE Trans. Microwave Theory Tech., vol. 47, pp. 1509–1514, Aug. 1999. [15] C.K. Wu, H.S. Wu,C.K.C. Tzuang, ” Electric–Magnetic–Electric Slow-Wave Microstrip Line and Bandpass Filter of Compressed Size,” IEEE Trans. Microwave Theory Tech., vol. 50, Aug 2002. [16] C. C. Chen, C. K. C. Tzuang, “Synthetic Quasi-TEM meandered transmission lines for compacted microwave integrated circuits ,” IEEE Trans. Microwave Theory Tech, vol. 52, pp. 1637-1647,June 2004. [17] T. S. Horng, J. M. Wu, L. Q. Yang, S. T. Fang, “A novel modified-t equivalent circuit for modeling ltcc embedded inductors with a large bandwidth ,” IEEE Trans. Microwave Theory Tech, vol. 51, pp. 2327-2333, Dec. 2003 [18] T.N. Kuo, Y.S. Lin, C.H. Wang,,C.H.Chen “A Compact LTCC Branch-Line Coupler Using Modified-T Equivalent-Circuit Model for Transmission Line ,” IEEE microwave and wireless components letters, vol. 16,, Feb.2006 [19] J.H. Gau, S. Sang, R.T. Wu, F.J. Shen, H.H. Chen, A. Chen, J. Ko, “Novel fully symmetrical inductor,” IEEE Electron Device Letters, vol. 25, pp.608-609 , Sep. 2004. [20] J.M. Lopez-Villegas, J. Samitier, C. Cane , P. Losantos, “Improvement of the quality factor of rf integrated inductors by layout optimization ,” IEEE Radio Frequency Integrated Circuits Symposium, pp.169-172, 1998. [21] C. P. Yue, S. S. Wong, “On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC’s,” IEEE Journal of Solid-state Circuits, vol. 33, pp. 734-752, MAY 1998. [22] J. N. Burghartz, M. Soyuer, K. A. Jenkins, “Microwave inductors and capacitors in standard multilevel interconnect silicon technology,” IEEE Trans. Microwave Theory Tech., vol. 44, pp. 100-104, Jan. 1996. [23] B.Q. Lin, Q.R.R Zheng, N.C.Yuan, “A Novel Planar PBG Structure for Size Reduction,” IEEE Microwave and wireless components letters, vol. 16, MAY 2006. [24] H. M. GREENHOUSE “Design of Planar Rectangular Microelectronic Inductors” . IEEE Trans on parts, hybrids, and packaging, vol.2 ,pp.-10, June 1974. [25] C. Patrick Yue, Changsup Ryu, Jack Lau*, Thomas H. Lee, and S. Simon Wong,” A PHYSICAL MODEL FOR PLANAR SPIRAL INDUCTORS ON SILICON”, [26] 張盛富 戴明鳳, “無線通信之射頻被動電路設計”, 全華科技圖書股份有限公司 [27] Ansoft HFSS Engineering Note, Ansoft Corporation [28] Ansoft Q3D 6.0 Technique Notes, Ansoft Corporation | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/32522 | - |
dc.description.abstract | 為配合發展單晶片無線通訊收發系統,本研究將於矽基CMOS製程上,研發新式小型化集總元件傳輸線,可達成比傳統傳輸線模型(T模型或π模型)更大的頻寬,並以之為基礎,開發新式矽基小型化射頻及微波被動元件,以建立矽基無線收發單晶片之關鍵元組件技術。本論文提出將傳輸線修正T型等效電路以IC製程來實現的方法,在CMOS 0.18製程中,根據所需要的傳輸線參數,利用對稱型平面電感及平行板電容來實現修正T型等效電路中所需要的電路元件,並且以CMOS 018製程實際製作了一條特性組抗50Ω,電氣長度在5.25GHz為90度的集總元件等效傳輸線,其操作頻寬可達11GHz,而電路面積僅為傳統設計的15.57 %。而為了達到更進一步縮小電路面積的目的,亦以一條高阻抗集總元件等效傳輸線,利用於輸出埠輸入埠上並聯電容的方式,等效為一條特性組抗為50Ω的四分之一波長等效傳輸線共振器,其電路面積僅為傳統設計的14.14 %。又為了更進一步提升集總元件等效傳輸線的頻寬,將原本的特性組抗50Ω電氣長度為90度的集總元件等效傳輸線,改用特性組抗50Ω,電氣長度為2度的集總元件等效傳輸線單元電路串接而成。此設計的優點是可以將對稱型平面電感的共振頻率移至高頻,藉此增加所設計傳輸線的頻寬,並以CMOS 018製程實際製作,其操作頻寬可達20GHz,而電路面積僅為傳統設計的28.45 %。最後,並將所研製之集總元件等效傳輸線,應用於小型化矽基威爾金森功率分配器的設計。 | zh_TW |
dc.description.abstract | In order to cooperate with the development of system on chip for wireless transceiver systems, the miniature Si-based lumped-element equivalent transmission line is proposed, which may achieve much wider bandwidth than the conventional T- or models of transmission lines. Based on the proposed lumped-element equivalent transmission lines, novel miniature Si-based RF/microwave passive components are also developed, so as to establish the key component technology for Si-based single chip wireless transceivers. In this thesis, we propose the implementation method of modified-T equivalent circuit of transmission line with IC process. In CMOS 0.18 process, based on the required parameters of transmission line, the symmetrical planar spiral (SPS) structure and parallel-plate capacitor are utilized to realize the circuit parameters needed in T-modified equivalent circuit. A Si-based equivalent transmission line with characterization impedance 50 Ω and electrical length of 90o at 5.25GHz is implemented using CMOS 0.18 process, and the operation bandwidth is up to 11 GHz with only 15.57 % the size of conventional designs.
The size of proposed equivalent transmission line can be further reduced by adding additional shunt capacitors at the input and output ports of a high impedance equivalent transmission-line. A Si-based quarter-wavelength equivalent transmission line resonator of 50Ω is implemented, and its size is only 14.14 % that of the conventional designs. In order to further improve the bandwidth of proposed equivalent transmission line, the transmission line with characterization impedance of 50 Ω and electrical length of 90o at 11 GHz is implemented alternatively by a cascade of equivalent transmission line unit-cells with 2o electrical length. In this way, the self resonance frequency of the spiral inductor can be shifted to higher frequencies such that the bandwidth of equivalent transmission line becomes larger. Specifically, a lumped-element equivalent transmission line of 50Ω and 90o electrical length at 5.25GHz is implemented in CMOS 0.18 process, and a bandwidth of 20GHz is achieved. Finally, the design of miniature Si-based Wilkinson power dividers based on the proposed lumped-element equivalent transmission line are demonstrated. | en |
dc.description.provenance | Made available in DSpace on 2021-06-13T04:11:16Z (GMT). No. of bitstreams: 1 ntu-95-R93942055-1.pdf: 4418628 bytes, checksum: f1111e95a0a994c1f7177858e81eb063 (MD5) Previous issue date: 2006 | en |
dc.description.tableofcontents | 目錄
目錄................................Ⅰ 圖表目錄 .............................Ⅲ 第一章 簡介 1.1 研究動機與目的.......................1 1.2 文獻回溯..........................2 1.3 章節內容..........................3 第二章 傳輸線介紹 2.1 前言............................5 2.2 一般常見傳輸線.......................5 2.3 修正T型等效傳輸線.....................7 2.4 結論............................8 第三章 等效傳輸線 3.1 前言............................13 3.2電感模擬討論 3.2.1 電感模型........................13 3.2.2 等效介值模擬......................14 3.2.3 對稱型平面電感.....................16 3.3設計流程..........................18 3.4 修正T型等效傳輸線 3.4.1 修正T型等效傳輸線-90度線...............18 3.4.2 修正T型等效傳輸線-縮小化90度線............20 3.4.3修正T型等效傳輸線-單位細胞(unit cell)傳輸線........22 3.4.4集總元件等效傳輸線-設計於LTCC(Low-Temperature Cofired Ceramics)之傳輸線....................23 3.5 結論...........................24 第四章 應用電路 4.1 前言............................51 4.2 威爾金森功率分配器設計...................51 4.3 結論............................54 第五章 結論 結論..............................67 參考文獻..............................72 圖表目錄 第一章 圖Fig 1.1 模組示意圖.......................4 圖Fig 1.2 慢波結構比較圖.....................4 第二章 表2.1 傳輸線比較.........................6 表2.2 70Ω 90°傳輸線參數.....................8 圖Fig 2.1 傳輸線種類.......................9 圖Fig 2.2 PBG圖…………….…………………………………………………..9 圖Fig 2.3 傳統傳輸線模型.....................10 圖Fig 2.4 修正T型電路模型(1) ..................10 圖Fig 2.5 修正T型電路模型(2) ..................10 圖Fig 2.6 傳統模型與Modified-T傳輸線|S21|比較圖.........11 圖Fig 2.7 傳統模型與Modified-T傳輸線|S11|比較圖.........11 圖Fig 2.8 傳統模型與Modified-T傳輸線相位比較圖.........12 第三章 表 3.1 表格設計(一) ........................21 表 3.2 表格設計(二) ........................22 表 3.3 電路面積比較圖.......................24 圖Fig 3.1 對稱平面型電感等效模型.................25 圖Fig 3.2 Q3D等效介質粹取圖(1).................26 圖Fig 3.3 Q3D等效介質粹取圖(2) .................26 圖Fig 3.4 慢波因子等效介質粹取圖(1) ...............27 圖Fig 3.5 慢波因子等效介質粹取圖(2) ...............27 圖Fig 3.6 CMOS等效介質層....................28 圖Fig 3.7 對稱型平面電感示意圖..................28 圖Fig 3.8 對稱型平面電感模擬示意圖(a)(b) .............29 圖Fig 3.9 對稱平面型等效電感電感模擬圖..............30 圖Fig 3.10 對稱平面型等效電感與修正T型等線傳輸線對照圖(1) ....31 圖Fig 3.11 對稱平面型等效電感與修正T型等線傳輸線對照圖(2) ....31 圖Fig 3.12 電路結構圖.......................32 圖Fig 3.13 照相圖.........................32 圖Fig 3.14 探針示意圖.......................33 圖Fig 3.15 探針模擬設定圖.....................33 圖Fig 3.16 探針模擬圖.......................34 圖Fig 3.17 |S21|與|S11|參數大小對頻率圖...............35 圖Fig 3.18 S參數相角對頻率圖(窄頻響應) ..............36 圖Fig 3.19 S參數大小對頻率圖(寬頻響應) ..............37 圖Fig 3.20 S參數相角對頻率圖(寬頻響應) ..............37 圖Fig 3.21 特性組抗(實部)圖....................28圖Fig 3.22 特性組抗(虛部)圖....................28 圖Fig 3.23 慢波因子(β/κo) ....................39 圖Fig 3.24 慢波因子(α/κo) ....................39 圖Fig 3.25 品質因子圖.......................40 圖Fig 3.26 能量損耗圖.......................40 圖Fig 3.27 結構圖.........................41 圖Fig 3.28 照相圖........................41圖Fig 3.29 理想開路共振器.....................42 圖Fig 3.30 輸入組抗圖(實部與虛部圖) ...............42 圖Fig 3.31 輸入組抗圖.......................43 圖Fig 3.32 S參數圖........................43 圖Fig 3.33 單位細胞(unit cell)結構圖...............44 圖Fig 3.34 CMOS層數結構圖....................44 圖Fig 3.35 照相圖.........................45 圖Fig 3.36 S參數大小對頻率圖...................45 圖Fig 3.37 相角對頻率圖(窄頻) ..................46 圖Fig 3.38 特性組抗(實部與虛部)圖.................46 圖Fig 3.39 特性組抗圖.......................47 圖Fig 3.40 慢波因子圖.......................47 圖Fig 3.41 品質因子圖.......................48 圖Fig 3.42 功率損耗圖.......................48 圖Fig 3.43 70Ω 90。傳輸線三維佈局圖...............49 圖Fig 3.44 S參數模擬圖......................49 圖Fig 3.45 相位模擬圖.......................50 第四章 表 4.1 電路比較表.........................55 圖Fig 4.1 威爾金森功率分配器...................56 圖Fig 4.2 電路圖.........................57 圖Fig 4.3 照相圖........................57圖Fig 4.4 插入損耗 |S21|.....................57 圖Fig 4.5 折返損耗|S11|......................58 圖Fig 4.6 隔離度|S23|.......................58 圖Fig 4.7 電路模擬圖.......................59 圖Fig 4.8 照相圖.........................60 圖Fig 4.9 三埠電路模擬圖(1) ...................61 圖Fig 4.10 插入損耗 |S21|.....................61 圖Fig 4.11 折返損耗 |S11|.....................62 圖Fig 4.12 隔離度 |S23|......................62 圖Fig 4.13 三埠電路模擬圖(1) ...................63 圖Fig 4.14 |S21|..........................64 圖Fig 4.15 |S11|..........................64 圖Fig 4.16 |S23|..........................65 圖Fig 4.17 功率分配器佈局圖....................65 圖Fig 4.18 S參數模擬結果(寬頻) .................66 圖Fig 4.19 S參數模擬結果(寬頻) .................66 | |
dc.language.iso | zh-TW | |
dc.title | 小型化集總元件傳輸線 | zh_TW |
dc.title | Miniaturized lumped-element transmission line | en |
dc.type | Thesis | |
dc.date.schoolyear | 94-2 | |
dc.description.degree | 碩士 | |
dc.contributor.coadvisor | 陳俊雄 | |
dc.contributor.oralexamcommittee | 吳瑞北,毛紹綱,鐘世忠 | |
dc.subject.keyword | 傳輸線,慢波因子,螺旋電感,修正等效T模型,威爾金森功率分配器, | zh_TW |
dc.subject.keyword | transmission line,slow wave factor,cmos,spiral inductance,modified-T model,Wilkinson power divider,LTCC, | en |
dc.relation.page | 75 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2006-07-26 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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