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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/32498
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor郭斯彥
dc.contributor.authorMing-Jhe Duen
dc.contributor.author杜明哲zh_TW
dc.date.accessioned2021-06-13T03:53:01Z-
dc.date.available2011-07-29
dc.date.copyright2006-07-29
dc.date.issued2006
dc.date.submitted2006-07-25
dc.identifier.citation[1] M. Berkhout, “A Integrated 200-W Class-D Audio Amplifier,” in IEEE J. of Solid-State Circuit, Vol. 38, NO.7, July 2002 Page(s):1198 – 1206.
[2] B. Froejt, V. Rentala, J. D. Arteaga, G. Burra, “A 700mW Class D Design With Direct Battery Hookup in a 90-nm Process,” IEEE J. of Solid-State Circuit, Vol. 40, No. 9, September. 2005 Page(s):1880 - 1887.
[3] P. Morrow, E. Gaalaas, O. McCarthy, “A 20-W Stereo Class-D Audio Output Power Stage in 0.6 um BCDMOS Technologh ,” IEEE J. of Solid–State Circuit, Vol.39,No.11 November 2004 Page(s):1948 - 1958.
[4] Behzad Razavi, Design of Analog CMOS Integrated Circuits. Boston, MA: McGRAW-HILL, 2001.
[5] Behzad Razavi, Principles of Data Conversion System Design. WILEY-INTERSCIENCE, 1995.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/32498-
dc.description.abstractA one-chip integrated circuit of a 2-W class-D audio power amplifier with very high efficiency using a CMOS technology is presented. Compared with traditional class-AB amplifiers that are very poor at efficiency, most below 50%, the proposed class-D amplifier has the efficiency of 90% at the smaller distortion level. The class-D amplifiers generate pulse-width-modulated (PWM) signals by comparing a triangle-wave with input-signals. An output stage with zero dead time and high efficiency is applied to improve the linearity and reduce wasted battery energy. An approach to reducing distortion is applied by using feedback calibration.en
dc.description.provenanceMade available in DSpace on 2021-06-13T03:53:01Z (GMT). No. of bitstreams: 1
ntu-95-R92943076-1.pdf: 823062 bytes, checksum: c96557fd796730713926bec70e6696a2 (MD5)
Previous issue date: 2006
en
dc.description.tableofcontentsContents
Acknowledgement…………………………………………………………….. i
Abstract………………………………………………………………………. ii
Contents……………………………………………………………………… iii
Figure Captions………………………………………………………………. v
Table Captions………………………………………………………………viii
Chapter 1 Introduction
Chapter 2 Principle and Design of the Class-D Audio Power Amplifier
2.1 Structure of the Class-D Amplifier 3
2.2 Principle of the pulse 5
2.3 Advance Issues of Class-D Amplifier 8
2.3.1 Design and Distortion of the Output Stage 8
2.3.2 Power Efficiency 13
2.4 Previous Work of the Class-D Amplifier 18
2.4.1 A Class-D Amplifier Using A Spectrum Shaping Technique 18
2.4.2 A 700mW Class-D Design with Direct Battery Hookup in a 90nm Process 19
2.4.3 An Integrated 200W Class-D Audio Amplifier 22
Chapter 3 The Proposed Circuit of The Class-D Audio Power Amplifier
3.1 The Proposed Circuit of The Class-D Audio Power Amplifier and Simulation Result 26
3.2 Structure of the Proposed Class-D Amplifier 28
3.3 Implementation of the Block Diagram 29
3.2.1 Triangle Waveform Generator 29
3.2.2 The PWM Comparator 30
3.2.3 The Integrator of the Input Stage 31
3.2.4 The Nonoverlapping Driving Circuit 32
3.2.5 The Low-pass Filter 33
3.3 Simulation Result for Proposed Circuit 34
3.3.1 Relationship of fin and the Total Harmonic Distortion 34
3.3.1 Power Efficiency 34
Chapter 4 Conclusion
5.1 Conclusions 36
5.2 Future Work 37
Reference 38
dc.language.isoen
dc.subject音訊zh_TW
dc.subjectD類zh_TW
dc.subjectAudioen
dc.subjectCMOSen
dc.subjectClass Den
dc.titleCMOS高效率D類音訊放大器zh_TW
dc.titleCMOS Highly-Efficient Class-D Audio Amplifieren
dc.typeThesis
dc.date.schoolyear94-2
dc.description.degree碩士
dc.contributor.oralexamcommittee陳少傑,陳科宏,黃立仁
dc.subject.keywordD類,音訊,zh_TW
dc.subject.keywordCMOS,Class D,Audio,en
dc.relation.page38
dc.rights.note有償授權
dc.date.accepted2006-07-26
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
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