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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 顧孟愷 | |
dc.contributor.author | Tzu-Hsiang Lo | en |
dc.contributor.author | 羅子翔 | zh_TW |
dc.date.accessioned | 2021-06-13T03:13:22Z | - |
dc.date.available | 2011-08-29 | |
dc.date.copyright | 2006-08-29 | |
dc.date.issued | 2006 | |
dc.date.submitted | 2006-08-22 | |
dc.identifier.citation | [1] R. G. Gallager, “Low-Density Parity-Check Codes,” IRE Trans. Info. Theory, IT-8:21-28, Jan 1962.
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/31465 | - |
dc.description.abstract | Hybrid automatic repeat request (H-ARQ) scheme is an adaptive rate error control system that can adapt to changing channel condition in wireless communication systems. Hybrid ARQ system can achieve desired throughput efficiency and reliability for the data packet network that requires error free data transmission and is insensitive to transmission delay. The performance of hybrid ARQ depends on the error correcting capability of error correcting code and its retransmission mechanism. Low-density parity-check (LDPC) code is chosen as our error correcting code for its strong error correcting capability. This paper focuses on designing an intelligent retransmission mechanism. We proposed a retransmission mechanism called type-II hybrid data puncturing (DP) and diversity combining (DC) ARQ scheme. In high signal to noise ratio (SNR) situation, data puncturing is applied to enhance the system throughput. In low SNR situation, diversity combining is used to facilitate robust transmission. Our scheme combines the strength of both schemes. In comparison to rate-compatible (RC) type-II hybrid ARQ scheme, the proposed ARQ scheme operates on much higher code rate LDPC code for encoding and decoding. It has lower encoder and decoder complexity than rate-compatible (RC) type-II hybrid ARQ scheme. Because of its low hardware complexity and throughput performance, the proposed scheme is suitable for the modern high throughput mobile communication system. | en |
dc.description.provenance | Made available in DSpace on 2021-06-13T03:13:22Z (GMT). No. of bitstreams: 1 ntu-95-R93922060-1.pdf: 689566 bytes, checksum: 96019981eee831029d91115681c2c18d (MD5) Previous issue date: 2006 | en |
dc.description.tableofcontents | Table of Contents
Acknowledgement iii Abstract iv List of Tables vi List of Figures vii Chapter 1 Introduction 1 1.1 Overview of Hybrid ARQ System 1 1.2 Related Work about Type-II Hybrid ARQ 3 1.3 Performance Measurement of an Automatic Repeat Request System 5 1.4 Thesis Organization 6 Chapter 2 Type-II Hybrid ARQ Schemes Using LDPC Code 7 2.1 Low Density Parity Check Code 7 2.1.1 Encoding of LDPC code 8 2.1.2 Tanner graph representation 8 2.1.3 Decoding of LDPC code 9 2.2 Rate-Compatible LDPC ARQ Scheme 10 2.2.1 Advantage and Disadvantage of RC-LDPC 11 2.3 Diversity Combining 12 2.4 Data Puncturing LDPC ARQ Scheme 12 2.4.1 Shorten 12 2.4.2 Data Puncturing LDPC ARQ Retransmission Mechanism 14 2.4.3 Advantage and Disadvantage of DP-LDPC ARQ 15 Chapter 3 Design of Hybrid ARQ Scheme Using LDPC Code 16 3.1 Comparison of RC-LDPC, DP-LDPC, and Diversity Combining 16 3.2 Hybrid Data Puncturing and Diversity Combining Scheme1 18 3.2.1 Techniques of Combining DP and DC 20 3.3 Hybrid Data Puncturing and Diversity Combining Scheme2 26 Chapter 4 Simulation Result and Comparison 31 4.1 Comparison of Hybrid DP+DC Scheme2, VVCR DP, DC 31 4.2 Performance of Hybrid DP+DC Scheme at Different Code Rate 34 4.3 Hardware Issue of Implementing Hybrid DP+DC Scheme 36 4.3.1 Functionality of Syndrome Test Unit 37 4.3.2 Syndrome Test Unit FPGA implementation 38 Chapter 5 Conclusion and Future Work 40 5.1 Conclusion 40 5.2 Future Work 40 Reference 41 | |
dc.language.iso | en | |
dc.title | 使用低密度奇偶校驗碼之混合型自動重傳機制設計 | zh_TW |
dc.title | A Design of Hybrid ARQ Scheme using LDPC Code | en |
dc.type | Thesis | |
dc.date.schoolyear | 94-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 廖俊睿,林宗男,洪士灝 | |
dc.subject.keyword | 低密度奇偶校驗碼,混合型自動重傳機制, | zh_TW |
dc.subject.keyword | low-density parity-check,LDPC,hybrid automatic repeat request,H-ARQ, | en |
dc.relation.page | 43 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2006-08-23 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 資訊工程學研究所 | zh_TW |
顯示於系所單位: | 資訊工程學系 |
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