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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/31376完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 王暉(Huei Wang) | |
| dc.contributor.author | Wen-Ren Lee | en |
| dc.contributor.author | 李文仁 | zh_TW |
| dc.date.accessioned | 2021-06-13T02:46:24Z | - |
| dc.date.available | 2008-10-25 | |
| dc.date.copyright | 2006-10-25 | |
| dc.date.issued | 2006 | |
| dc.date.submitted | 2006-10-16 | |
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[52] Edmar Camargo, Design of FET frequency multipliers and harmonic oscillators, Artech House, Norwood, MA, 02062, 1998 [53] I. Oppermann, M. Hamalainen, and J. Iinatti, UWB Theory and Applications, John Wiley & Sons, Inc. 2004. [54] First report and order in the matter of Part 15 of the commission’s rules regarding Ultra-Wideband transmission systems, FCC, released, ET Docket 98-153, FCC 02-48, April 22, 2002. [55] M. D. Tsai, K. Y. Lin, and H. Wang, “A 5.4 mW LNA using 0.35-μm SiGe BiCMOS technology for 3.1-10.6 GHz UWB wireless receivers,” in IEEE RFIC Symp. Dig. pp. 335-338, June 2005. [56] N. Shiramizu, T. Masuda, M. Tanabe, and K. Washio, “A 3-10 GHz bandwidth low-noise and low-power amplifier for full-band UWB communications in 0.25-μm SiGe BiCMOS technology,” in IEEE RFIC Symp., pp. 39-42, Long Beach, June 2005 [57] J. Lee and J. D. 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Pekarik, “A 1.2 V Reactive-Feedback 3.1-10.6 GHz Ultrawideband Low-Noise Amplifier in 0.13 μm CMOS ” in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp.41 – 44, June 11-13, 2006 | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/31376 | - |
| dc.description.abstract | 在本論文中，我們設計並量測了兩個寬頻放大器以及一個高效率的頻率倍頻器。第一個60 GHz放大器使用商用0.15微米高電子移動度場效電晶體製程。第二個放大器則是應用於超寬頻系統的低功率消耗超寬頻分散式放大器，此電路使用0.18微米台積電所提供之新矽鍺電晶體製程。第三個電路則是應用於K-band的高效率頻率倍頻器，亦是使用0.15微米高電子移動度場效電晶體製程。
應用於V-band的三級串接低雜訊放大器，量測的結果有從40到70 GHz之頻寬，同時小訊號增益在一頻寬內約略有18 dB上下，除此之外，雜訊指數僅有6.8 dB，以及直流功率消耗70 mW。此電路有相當優良及平坦的小訊號增益表現，同時是為了60-GHz系統而設計的前端放大器。 而為了改良增益以及頻寬之效能，我們使用兩級串接的分散式放大器的架構，亦提出一個降低直流功率消耗之技術。同時，也介紹了此一低功率消耗超寬頻分散式放大器之設計流程與量測分析。這個矽鍺HBT低功率消耗超寬頻分散式放大器在量測上我們看到了相當好的增益和頻寬表現，同時此一電路是在目前已發表的HBT寬頻放大器論文中，呈現最好的每單位直流功率消耗中最大的增益頻寬積。另外，我們提出的降低直流功率消耗之技術亦可應用於其他的寬頻低雜放大器，例如CMOS轉阻放大器。在量測結果中，此一低功率消耗超寬頻分散式放大器呈現 1.2到11 GHz的頻寬以及平坦的小訊號增益，同時直流功率消耗只有5.6 mW，和使用PHEMT元件設計的寬頻放大器相比較，此一電路更適合用於超寬頻系統。而且我們提出的降低直流功率消耗之技術亦可以使用於分散式架構中，解決不必要之電壓降。 除了寬頻放大器，在微波和毫米波頻段之高速資料傳輸，為了調變需求而設計的頻率倍頻器也很有用處。藉著砷化鎵基材之優異特性，以及在本地振盪端應用頻率倍頻器來避免使用一個高頻的振盪器，我們可以有效的降低混頻電路的相位雜訊。除此之外，我們亦使用反射器（Reflector）以及緩衝放大器（Buffer Amplifier）來改善其轉換效率（Conversion Efficiency）和提供後級混波電路區足夠大的輸出功率。此一倍頻器可以有大於8 dB的轉換增益以及大於15 dBm的輸出功率。而此倍頻器之直流功率轉換效率（PAE, Power Added Efficiency）在6到10 GHz之間均可以大於10%。這個頻率倍頻器的量測結果不亞於目前已發表的其他類似的倍頻器。 | zh_TW |
| dc.description.abstract | This thesis includes the design methodology and implementation of a UWB distributed amplifier in TSMC 0.18-μm SiGe BiCMOS HBT process, a 60 GHz Broadband LNA and a high-efficiency K-band balanced frequency doubler both in commercial WIN 0.15-μm PHEMT power process.
The V-band three-stage broadband LNA in chapter 2 demonstrated the measured results of small signal gain about 18 dB from 40 to 70 GHz and noise figure about 6.8 dB at 60 GHz with total dc power consumption of 70 mW. This LNA has the flat gain from 40 to 70 GHz and is designed for the RF front-end amplifier of 60-GHz system. To enhance the gain and bandwidth performance, the silicon-based HBT low dc power consumption UWB distributed amplifier using the two two-stage cascade configuration and low dc power consumption technique is proposed. The design and analysis of the silicon-based HBT low dc power consumption UWB distributed amplifier are included. The SiGe HBT low-power consumption distributed amplifier presents good gain and bandwidth and demonstrates the highest gain bandwidth product GBW per dc power for broadband amplifiers using silicon-based HBT processes compared with recently published results. Furthermore, the low-power consumption technique can be used to design the wideband low-noise CMOS transimpedance amplifiers. Besides, the measured results of silicon-based HBT low-power consumption UWB distributed amplifier also show wide bandwidth and flat gain from 1.2 to 11 GHz. The dc power consumption is 5.6 mW and suitable for UWB system compared with those of PHEMT devices. The low dc power consumption technique is also proposed to solve the problem of the undesired voltage drop in the distributed structure. In addition to the UWB amplifier design, a millimeter-wave frequency multiplier, which is widely used for the modulation of high-speed data transmitted at microwave or millimeter-wave carrier frequencies, is also designed in chapter 4. By using the high speed offered by PHEMT technology, the employment of a direct LO chain can reduce mixing circuit phase noise by eliminating a high frequency local oscillator source. Besides, an additional reflector and buffer amplifier would also improve the conversion efficiency and provide enough output power for the mixing circuits. The conversion gain of the PHEMT balanced frequency doubler is greater than 8 dB with output LO power higher than 15 dBm. In addition, we also calculated the PAE in the frequency multiplier, which is better than 10% from 6 to 10 GHz in this design. The measured performance of the PHEMT frequency doubler rivals those of the other reported frequency multipliers. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T02:46:24Z (GMT). No. of bitstreams: 1 ntu-95-R93942067-1.pdf: 3376376 bytes, checksum: 99801f66fd9191a2370c82a78ecbfc87 (MD5) Previous issue date: 2006 | en |
| dc.description.tableofcontents | Abstract
Chapter 1. Introduction 1.1 Motivation…………………………………………………………………..1 1.2 Paper Survey…………………….……………………….…………………2 1.3 Contribution….……………………………………………………………..3 1.4 Chapter Outline……………………………………………………………..4 Chapter 2. A 60 GHz Low Noise Amplifier 2.1 Introduction of LNA Design……………………..…………………………6 2.2 Classical Stability and Gain Analysis 2.2.1 Stability Considerations……………………………...……………...7 2.2.2 Transducer Power Gain…………………………………………….10 2.3 Principles of Noise Behavior……………………………………………...11 2.4 60 GHz MMIC Low Noise Amplifier Design 2.4.1 Device Selection…………………………………………………...14 2.4.2 Circuit Design…………………………………………...…………15 2.5 Simulated and Measured Results of 60-GHz Low Noise Amplifier...……19 2.6 Summary…………………………………………………………………..22 Chapter 3. A Low DC Power Consumption UWB Distributed Amplifier 3.1 Introduction of Wideband Amplifiers……………………………….…….26 3.2 Basics of Conventional Distributed Amplifier……………………………28 3.3 A Low DC Power Consumption UWB Distributed Amplifier in TSMC 0.18-μm SiGe HBT Process 3.3.1 Overview of UWB System………………………………………...31 3.3.2 Small Signal Model………………………………………………..32 3.3.3 Device Selection…………………………………………………...39 3.3.4 Low DC Power Consumption Topology…………………………...41 3.3.5 The Two Two-stage DA Cascaded Configuration……….………...44 3.3.6 Simulation and Measurement Results……………………………...47 3.4 Summary…………………………………………………………………..53 Chapter 4. A High-Efficiency and High Output Power PHEMT Balanced K-Band Frequency Doubler 4.1 Introduction………………………………………………………………..56 4.2 Bias Condition of Active Frequency Multipliers 4.2.1 Class A……………………………………………………………..57 4.2.2 Class B & Class AB………………………………………………..59 4.3 Active Frequency Multiplier Design Procedure 4.3.1 Single-ended and Balanced Configurations……………………..…61 4.3.2 Input and Output Matching Network Configurations……………...62 4.3.3 High Output Power In a LO Chain………………...………………63 4.3.4 Balun in Balanced Structure………………..……………………...64 4.3.5 Reflector……………………………………………………………69 4.3.6 Buffer Amplifier…………………………………………………...70 4.3.7 Simulated Results of A 9.25-to-18.5 GHz MMIC Balanced High Output Power and High Efficiency Frequency Doubler.....…….....71 4.4 Measurement Results 4.4.1 Measurement Environment Setup and Its Calibration…….……….76 4.4.2 Measurement Results of 9.25-to-18.5 GHz PHEMT Frequency Doubler………………………………………………………….…77 4.5 Summary ………………………………………………………………….80 Chapter 5. Conclusion……………..…………………………………………..83 Reference ……………………..………….……………………………………..…..85 | |
| dc.language.iso | en | |
| dc.title | 微波單晶積體寬頻放大器與頻率倍頻器之設計 | zh_TW |
| dc.title | Design of MMIC Broadband Amplifiers and Frequency Doubler | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 95-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 黃天偉,張鴻埜,呂良鴻,林坤佑 | |
| dc.subject.keyword | 寬頻放大器,頻率倍頻器, | zh_TW |
| dc.subject.keyword | amplifier,frequency doubler, | en |
| dc.relation.page | 90 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2006-10-17 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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