請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/30390完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 張耀文(Yao-Wen Chang) | |
| dc.contributor.author | Chung-Wei Lin | en |
| dc.contributor.author | 林忠緯 | zh_TW |
| dc.date.accessioned | 2021-06-13T02:02:46Z | - |
| dc.date.available | 2007-07-16 | |
| dc.date.copyright | 2007-07-16 | |
| dc.date.issued | 2007 | |
| dc.date.submitted | 2007-07-05 | |
| dc.identifier.citation | [1] K. L. Clarkson, S. Kapoor, and P. M. Vaidya, 'Rectilinear shortest paths through polygonal bbstacles in O(n(log n)2) time,' Proceedings of ACM Symposium on Computational Geometry, pp. 251--257, 1987.
[2] J. Cong, K. S. Leung, and D. Zhou, 'Performance-driven interconnect design based on distributed RC delay model,' Proceedings of ACM/IEEE Design Automation Conference, pp. 606--611, 1993. [3] T. Cormen, C. Leiserson, R. Rivest, and C. Stein, Introduction to Algorithms, 2nd edition. McGraw-Hill/The MIT Press, 2001. [4] Z. Feng, Y. Hu, T. Jing, X. Hong, X. Hu, and G. Yan, 'An O(n log n) algorithm for obstacle-avoiding routing tree construction in the lambda-geometry plane,' Proceedings of ACM International Symposium on Physical Design, pp. 48--55, 2006. [5] J. L. Ganley and J. P. Cohoon, 'Routing a multi-terminal critical net: Steiner tree construction in the presence of obstacles,' Proceedings of IEEE International Symposium on Circuits and Systems, pp. 113--116, 1994. [6] M. R. Garey and D. S. Johnson, 'The rectilinear Steiner tree problem in NP-complete,' SIAM Journal on Applied Mathematics, vol. 32, pp. 826--834, 1977. [7] M. Hanan, 'On Steiner's problem with rectilinear distance,' SIAM Journal on Applied Mathematics, vol. 14, pp. 255--265, 1966. [8] D. W. Hightower, 'A solution to the line routing problem on the continous plane,' Proceedings of ACM Design Automation Workshop, pp. 1--24, 1969. [9] Y. Hu, Z. Feng, T. Jing, X. Hong, Y. Yang, G. Yu, X. Hu, and G. Yan, 'FORst: a 3-step heuristic for obstacle-avoiding rectilinear Steiner minimal tree construction,' Journal of Information and Computational Science, pp. 107--116, 2004. [10] Y. Hu, T. Jing, X. Hong, Z. Feng, X. Hu, and G. Yan, 'An-OARSMan: obstacle-avoiding routing tree construction with good length performance,' Proceedings of ACM/IEEE Asia and South Pacific Design Automation Conference, pp. 7--12, 2005. [11] C. Y. Lee, 'An algorithm for connections and its application,' IRE Transactions on Electronic Computer, pp. 346--365, 1961. [12] K. Mikami and K. Tabuchi, 'A computer program for optimal routing of printed circuit conductors,' Proceedings of IFIP Congress, vol. 2, pp. 1475--1478, 1968. [13] Z. C. Shen, C. C. N. Chu, and Y.-M. Li, 'Eficient rectilinear Steiner tree construction with rectilinear blockages,' Proceedings of IEEE International Conference on Computer Design, pp. 38--44, 2005. [14] Y. Shi, T. Jing, L. He, Z. Feng, and X. Hong, 'CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model,' Proceedings of ACM/IEEE Asia and South Pacific Design Automation Conference, pp. 630--635, 2006. [15] P.-C. Wu, J.-R. Gao, and T.-C. Wang, 'A fast and stable algorithm for obstacle-avoiding rectilinear Steiner minimal tree construction,' Proceedings of ACM/IEEE Asia and South Pacific Design Automation Conference, pp. 262--267, 2007. [16] Y. Yang, Q. Zhu, T. Jing, X. Hong, and Y. Wang, 'Rectilinear Steiner minimal tree among obstacles,' Proceedings of IEEE International Conference on ASIC, pp. 348--351, 2003. [17] M. C. Yildiz and P. H. Madden, 'Preferred direction Steiner trees,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 11, pp. 1368--1372, 2002. [18] H. Zhou, 'Efficient Steiner tree construction based on spanning graphs,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 5, pp. 704--710, 2004. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/30390 | - |
| dc.description.abstract | 在平面上,考慮障礙物之直角史坦納(Steiner)樹為利用直線或橫線連接所有節點、同時避免穿越障礙物的史坦納樹。在先進的積體電路設計中,繞線的過程必須考慮各種線路、區塊所產生的障礙物,因此這個問題越來越受到重視與關注。除此之外,由於積體電路為多層之製程,這使得在多層繞線平面中,建造考慮障礙物之直角史坦納樹成為一個新的挑戰。然而,考慮障礙物與多層繞線平面大幅增加了問題的難度,所以現存的研究結果都還有進步的空間。在此篇論文中,我們提出一個利用考慮障礙物之連結圖的演算法,它能快速地建造考慮障礙物之直角史坦納樹,而且不同於現存的演算法,我們的演算法在節點數為二以及其他許多情況達到最佳解。而對於在多層繞線平面中的問題,我們也提出許多不同於單層繞線平面的性質,並且適當地延伸單層繞線的演算法來解決此問題。實驗結果顯示,比起當今先進的演算法,我們的演算法能產生線長更短的考慮障礙物之直角史坦納樹。 | zh_TW |
| dc.description.abstract | Given a set of pins and a set of obstacles on a plane, an obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) connects these pins by vertical/horizontal edges, possibly through some additional points (called Steiner points), and avoids running through any obstacle to construct a tree with a minimal total wirelength. The OARSMT problem becomes more important than ever for modern nanometer IC designs which need to consider numerous routing obstacles incurred from power networks, prerouted nets, IP blocks, feature patterns for manufacturability improvement, etc. Consequently, the OARSMT problem has received dramatically increasing attention recently. Besides, because modern nanometer IC designs are processed layer by layer, it is a new challenge for designers to deal with the multi-layer OARSMT (ML-OARSMT) problem where pins are connected by vertical/horizontal edges within layers and vias between layers. Nevertheless, the presences of obstacles and multi-layers significantly increase the problem complexity, and thus most previous works for the OARSMT problem on a layer suffer from either poor quality or expensive running time. Based on the obstacle-avoiding spanning graph (OASG), this thesis presents an efficient algorithm with some theoretical optimality guarantees for the OARSMT construction on a layer. Unlike previous heuristics, our algorithm guarantees to find an optimal solution for any 2-pin net and many higher-pin nets. Furthermore, we identify key different properties of the ML-OARSMT problem from the single-layer counterpart and present the first algorithm to solve the ML-OARSMT problem. This algorithm can also guarantee an optimal solution for any 2-pin net and many higher-pin nets. Extensive experiments show that our algorithms result in significantly shorter wirelengths than all state-of-the-art works. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T02:02:46Z (GMT). No. of bitstreams: 1 ntu-96-R94943067-1.pdf: 605326 bytes, checksum: e9df1f9b03992b886ad5dbad383946e8 (MD5) Previous issue date: 2007 | en |
| dc.description.tableofcontents | Acknowledgements i
Abstract (Chinese) ii Abstract iii List of Tables vii List of Figures viii Chapter 1. Introduction 1 1.1 Obstacle-Avoiding Rectilinear Routing ............. 1 1.2 Previous Work ..................................... 3 1.2.1 Maze-Routing Based Approach .................... 3 1.2.2 Nondeterministic Approach ...................... 4 1.2.3 Construction-by-Correction Approach ............ 5 1.2.4 Connection-Graph Based Approach ................ 6 1.2.5 Hybrid Approach ................................ 9 1.3 Contributions ..................................... 9 1.4 Thesis Organization ............................... 11 Chapter 2. Problem Formulations 12 Chapter 3. Algorithm 15 3.1 OASG Construction ................................. 16 3.1.1 OASG Construction within a Region .............. 19 3.1.2 Properties of Pin-Vertex Shortest Paths ........ 22 3.2 OAST Construction ................................. 24 3.2.1 Pin-Vertices Shortest Path Computation ......... 24 3.2.2 Initial OAST Construction ...................... 25 3.2.3 Local Refinement ............................... 25 3.3 OARST Construction ................................ 26 3.4 OARSMT Construction ............................... 29 3.4.1 Overlapping Edge Removal ....................... 29 3.4.2 Redundant Vertex Removal ....................... 31 3.4.3 U-Shaped Pattern Refinement .................... 31 3.5 Optimality ........................................ 33 3.6 Complexity Analysis ............................... 35 3.6.1 Number of Edges in the OASG .................... 35 3.6.2 Time Complexity ................................ 39 Chapter 4. Extension to the ML-OARSMT Problem 41 4.1 ML-OASG Construction .............................. 43 4.1.1 Vertex Projection between Layers ............... 47 4.1.2 Vertex Projection within a Layer ............... 49 4.1.3 ML-OASG Construction ........................... 50 4.2 ML-OAST Construction .............................. 53 4.3 ML-OARST Construction ............................. 54 4.4 ML-OARSMT Construction ............................ 54 4.5 Optimality ........................................ 55 4.6 Complexity Analysis ............................... 56 Chapter 5. Experimental Results 57 5.1 The OARSMT problem ................................ 57 5.2 The ML-OARSMT problem ............................. 61 Chapter 6. Conclusions 67 Bibliography 69 | |
| dc.language.iso | en | |
| dc.subject | 多層平面 | zh_TW |
| dc.subject | 實體設計 | zh_TW |
| dc.subject | 繞線 | zh_TW |
| dc.subject | 史坦納樹 | zh_TW |
| dc.subject | 生成樹 | zh_TW |
| dc.subject | spanning tree | en |
| dc.subject | multi-layer | en |
| dc.subject | physical design | en |
| dc.subject | routing | en |
| dc.subject | Steiner tree | en |
| dc.title | 考慮障礙物之直角史坦納樹快速建造 | zh_TW |
| dc.title | Efficient Obstacle-Avoiding Rectilinear Steiner Tree Construction | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 95-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 陳少傑(Sao-Jie Chen),王廷基(Ting-Chi Wang),陳宏明(Hung-Ming Chen) | |
| dc.subject.keyword | 實體設計,繞線,史坦納樹,生成樹,多層平面, | zh_TW |
| dc.subject.keyword | physical design,routing,Steiner tree,spanning tree,multi-layer, | en |
| dc.relation.page | 71 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2007-07-09 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位: | 電子工程學研究所 | |
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