請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/30327
標題: | 高階影像特徵擷取之晶片設計及其應用 Advanced Visual Chip Design for Feature Extraction and Its Application |
作者: | Chieh-Lun Lu 呂杰倫 |
指導教授: | 傅立成 |
關鍵字: | 多階層影像處理,平行與管線特性,多重尺度Harris角點,軟硬體共同設計,目標物辨識, Multi-layer Image Processing,Parallel and Pipeline Properties,Multi-scale Harris corner,software-hardware co-design,Pattern Recognition, |
出版年 : | 2007 |
學位: | 碩士 |
摘要: | 在現今高等智慧機器人的感知系統中,影像資料已經是一種必備的感知來源以辨識解析環境,而透過多階層單一影像運算所組成之複合式影像處理較可能完成使用者的特殊需求。但限制於現今電腦CPU為主的架構中,利用軟體來實現具有多階層現象的影像處理可能會造成很嚴重的時間延遲或者是資源霸佔的現象,而導致機器人其他任務執行的失敗。在本篇論文中,首先分析探討這種多階層影像處理,並且研究其處理時的運算和資料流動,發現這類型的影像處理具有大量平行處理和管線的特性。因此,著眼於即時處理的目標和符合此種多階層影像處理的概念,我們設計出一套新式硬體架構,不但可以將複雜的影像處理獨立實現於晶片中,並且達到即時處理的性能。
利用此硬體架構,我們實現了多重尺度Harris角點的特徵擷取於FPGA晶片中,並利用軟硬體共同分工設計來實現整個目標物辨識系統。利用軟體系統實現了形狀紋理演算法和可以處理非線性變形的薄板曲線轉換法結合了硬體萃取的特徵點,使得欲辨識之目標物不管在遠近、旋轉甚至輕微的非線性扭曲之下,都可以達到即時的辨識和追蹤。 Recently, in advanced robotic system, image information has been an important sense to recognize the environment, and researchers can realize specific or complicated applications by combining several single image operations to form up an advanced multi-layer image processing. However, limited by the CPU-based architecture, multi-layer image processing is always implemented in software system which may cause serious time-delay or resource grabbing. Consequently, it will probably lead to failure of executing other tasks in robotic system. In this thesis, after deeply analyzing the data flow and operations in multi-layer image processing, we can find out that it has many parallel and pipeline properties inherently, and these properties actually are suitable to implement in hardware system. Therefore, we design a novel hardware architecture, which not only accomplish the multi-layer image processing on a chip independently, but also achieve real-time performance. By this hardware architecture, we realize the multi-scale Harris corner detector in FPGA and use the software-hardware co-design to implement the overall pattern recognition process. Since the features are detected by our visual chip in real-time, we combine it with Shape Context descriptor and TPS(Thin Plate Spline) transformation realized in software system to do the pattern recognition, even though there are scale、rotational variances, and furthermore the nonlinear deformation of the object, our system can track it very well and in real-time. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/30327 |
全文授權: | 有償授權 |
顯示於系所單位: | 電機工程學系 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-96-1.pdf 目前未授權公開取用 | 6.55 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。