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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/27762完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 洪士灝(Shih-Hao Hung) | |
| dc.contributor.author | Chien-Cheng Wu | en |
| dc.contributor.author | 吳建成 | zh_TW |
| dc.date.accessioned | 2021-06-12T18:19:16Z | - |
| dc.date.available | 2007-09-03 | |
| dc.date.copyright | 2007-09-03 | |
| dc.date.issued | 2007 | |
| dc.date.submitted | 2007-08-27 | |
| dc.identifier.citation | [1] Alan J. Smith, Disk cache—miss ratio analysis and design considerations, ACM Transactions on Computer Systems (TOCS), v.3 n.3, p.161-203, Aug. 1985.
[2] Pei Cao , Edward W. Felten , Anna R. Karlin , Kai Li, Implementation and performance of integrated application-controlled file caching, prefetching, and disk scheduling, ACM Transactions on Computer Systems (TOCS), v.14 n.4, p.311-343, Nov. 1996. [3] Pei Cao , Edward W. Felten , Anna R. Karlin , Kai Li, A study of integrated prefetching and caching strategies, Proceedings of the 1995 ACM SIGMETRICS Joint International Conference on Measurement and Modeling of Computer Systems, p.188-197, May 15-19, 1995, Ottawa, Ontario, Canada. [4] Chye Lin Chee, Hongjun Lu , Hong Tang , C. v. Ramamoorthy, Adaptive Prefetching and Storage Reorganization In A Log-Structured Storage System, IEEE Transactions on Knowledge and Data Engineering, v.10 n.5, p.824-838, September 1998. [5] Open SystemC Initiative (OSCI), http://www.systemc.org/ . [6] The DiskSim Simulation Environment, http://www.pdl.cmu.edu/DiskSim . [7] Trace Distribution Center, Performance Evaluation Laboratory, Brigham Young University, http://tds.cs.byu.edu/tds/ . [8] Andrew Tomkins , R. Hugo Patterson , Garth Gibson, Informed multi-process prefetching and caching, Proceedings of the 1997 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, p.100-114, June 15-18, 1997, Seattle, Washington, United States. [9] Nancy Tran , Daniel A. Reed, ARIMA time series modeling and forecasting for adaptive I/O prefetching, Proceedings of the 15th International Conference on Supercomputing, p.473-485, June 2001, Sorrento, Italy. [10] R. H. Patterson , G. A. Gibson , E. Ginting , D. Stodolsky , J. Zelenka, Informed prefetching and caching, Proceedings of the fifteenth ACM symposium on Operating Systems Principles, p.79-95, December 03-06, 1995, Copper Mountain, Colorado, United States. [11] Vivekanand Vellanki , Ann L. Chervenak, A cost-benefit scheme for high performance predictive prefetching, Proceedings of the 1999 ACM/IEEE Conference on Supercomputing (CDROM), p.50-es, November 14-19, 1999, Portland, Oregon, United States. [12] Butt, A. R., Gniady , C., and Hu , Y. C. 2005., The performance impact of kernel prefetching on buffer cache replacement algorithms, Proceedings of the ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, p.157-168, 2005. [13] Hut Let and Dan Duchamp., An analytical approach to file prefetching. In Proceedings of the 1997 USENIX Annual Technical Conference, p.275-288, 1997. [14] StorageReview.Com, http://www.storagereview.com/map/lm.cgi/str . [15] Transaction Processing Performance Council, http://www.tpc.org/ . [16] TPC-C, http://www.tpc.org/tpcc/ . [17] David A. Patterson , John L. Hennessy, Computer architecture: a quantitative approach, Morgan Kaufmann Publishers Inc., San Francisco, CA, Third edition 2003. [18] Jungho Huh, 'Two-Level Cache for Distributed System in RAID 5 Disk Controller,' icseng, pp. 64-69, 18th International Conference on Systems Engineering (ICSEng'05), 2005. [19] Huh, J. and Chang, T. 2003. Hierarchical disk cache management in RAID 5 controller. Journal of Computing Sciences in Colleges, v.19, n.2, p.47-59, Dec. 2003. [20] Chen Yun, Yang Genke, Wu Zhiming, 'The Application of Two-Level Cache in RAID System,' Proceedings of the 4th World Congress on Intelligent Control and Automation, June, 2002. [21] Jean-Loup Baer, Wen-Hann Wang, “On the inclusion properties for multi-level cache hierarchies,” Proceedings of the 15th Annual International Symposium on Computer Architecture, p.73-80, May 30-June 02, 1988, Honolulu, Hawaii, United States. [22] Alan J. Smith, Cache memories, ACM Computing Surveys (CSUR), v.14 n.3, p.473-530, Sept. 1982. [23] PostgreSQL, http://www.postgresql.org/ . [24] Peter M. Chen , Edward K. Lee, Striping in a RAID level 5 disk array, Proceedings of the 1995 ACM SIGMETRICS Joint International Conference on Measurement and Modeling of Computer Systems, p.136-145, May 15-19, 1995, Ottawa, Ontario, Canada. [25] Jia-Siang Chen, Shih-Hao Hung. Performance Optimization on a RAID System: Design and Implementation of a Fast Indexing Table for Disk Caching, 2007, NTU, Taiwan. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/27762 | - |
| dc.description.abstract | 快取 (Caching) 與預先提取 (Prefetching) 對於儲存伺服器的運作是很重要的技術。由於記憶體與硬碟存取速度的差距持續增大，快取與預先提取對系統效能的提升在現代的儲存伺服器中扮演相當重要的角色。在這篇論文中，我們在廣達公司 (Quanta Computer Incorporation) 製作的，內部代號為RF2的儲存伺服器上，針對原有的快取機制的效能進行分析，提出新的快速快取 (Fast Caching) 的設計來降低其純取時間以及儲存伺服器處理機的工作量，同時我們也加入新的適應性預先提取技術 (Adaptive Prefetch) 進一步去縮短讀取磁碟的時間。我們利用trace-driven simulation 的方式實驗並且預估我們所提出的快速快取與適應性預先提取技術在RF2儲存伺服器上的效能表現。我們發現，我們所提出的技術對於TPC-C的效能相當大的改善。 | zh_TW |
| dc.description.abstract | Caching and prefetch are important techniques for designing a storage system. As the speed gap between memory and disk is so large today, caching and prefetch are critical to enterprise-class storage applications, which demands high-performance. In this thesis, we studied the performance of the latest mid-range storage server produced by Quanta Computer Incorporation (codename: Rb2). We analyzed the existing caching mechanism in the server and developed a fast caching methodology to reduce the cache access latency and processing overhead of the storage controller. In addition, we proposed a new adaptive prefetch scheme reduces the average disk access time seen by the host. Via trace-driven simulation, we evaluated the performance of our new caching and adaptive prefetch schemes. Our results showed the performance improvement for the TPC-C benchmark. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-12T18:19:16Z (GMT). No. of bitstreams: 1 ntu-96-R94922119-1.pdf: 389374 bytes, checksum: ee80c5e5bc574ebdc1480868b4e4455a (MD5) Previous issue date: 2007 | en |
| dc.description.tableofcontents | 中文摘要 iii
Abstract iv Table of Contents v List of Figures vii Chapter 1 Introduction 1 1.1 Motivation and Goal 1 1.2 Related Work 2 1.3 Thesis Organization 3 Chapter 2 Storage Cache Memory Architecture 5 2.1 Definitions of Stripe, Stripe-Unit Size, and Cache Block 5 2.2 Basics Architecture of Storage System 6 2.3 Two-Level Disk Cache Management 10 2.4 L1 Cache Hierarchy Design 12 2.5 Benefit of L1 Cache 14 Chapter 3 System Model 16 3.1 Timing Model 16 3.2 Inaccuracy Issues 17 3.3 System Platform 18 Chapter 4 Prefetch Mechanisms 20 4.1 Basics of Prefetch and Caching 20 4.2 The Disk Access Time 21 4.3 Cost and Benefit of Prefetch 22 4.4 Adaptive Prefetch 23 4.4.1 Motivation 23 4.4.2 Adaptive Prefetch State Machine 24 Chapter 5 Simulation Results 29 5.1 Traces 29 5.2 Simulation Models 30 5.4 Validation 39 Chapter 6 Conclusion and Future Work 41 | |
| dc.language.iso | en | |
| dc.subject | 快取 | zh_TW |
| dc.subject | 預先提取 | zh_TW |
| dc.subject | 效能評估 | zh_TW |
| dc.subject | 儲存伺服器 | zh_TW |
| dc.subject | 磁碟陣列 | zh_TW |
| dc.subject | caching | en |
| dc.subject | disk array | en |
| dc.subject | performance evaluation | en |
| dc.subject | storage server | en |
| dc.subject | perfetching | en |
| dc.title | 評估快取與預先提取在儲存伺服器上的效能 | zh_TW |
| dc.title | Performance Evaluation of Caching and Prefetch Strategies on a Storage Server | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 95-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 郭大維(Tei-Wei Kuo),王聖德(Sheng-De Wang),廖世偉(Shih-Wei Liao) | |
| dc.subject.keyword | 快取,預先提取,儲存伺服器,磁碟陣列,效能評估, | zh_TW |
| dc.subject.keyword | caching,perfetching,storage server,disk array,performance evaluation, | en |
| dc.relation.page | 47 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2007-08-27 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 資訊工程學研究所 | zh_TW |
| 顯示於系所單位： | 資訊工程學系 | |
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