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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 盧信嘉(Hsin-Chia Lu) | |
dc.contributor.author | Tuck Boon Chan | en |
dc.contributor.author | 曾德文 | zh_TW |
dc.date.accessioned | 2021-06-12T18:09:13Z | - |
dc.date.available | 2007-12-03 | |
dc.date.copyright | 2007-12-03 | |
dc.date.issued | 2007 | |
dc.date.submitted | 2007-11-24 | |
dc.identifier.citation | [1] D.Heo, A. Sutono, E.Chen et al, “A 1.9 GHz DECT CMOS Power Amplifier with Fully Integrated Multilayer LTCC Passives,” IEEE Microwave and Wireless Component Letters, vol. 11, issue 6, pp. 249-251 June 2001.
[2] Sheng-Mou Lin, Li-Qun Yang, and Hong-Yang Chang, “Scalable Lumped Model with Multiple Physical Parameters for Embedded Passives,” in Proc. IEEE Electronic Components and Technology Conference, vol. 2, pp. 1842-1845, May 2005. [3] H. M. Greenhouse, “Design of Planar Rectangular Microelectronic Inductors,” IEEE Trans on Parts, Hybrids, and Packaging, vol. 10, issue 2, pp. 101-109, June 1974. [4] Kari Stadius, Mikko Kaltiokallio, Kari Halonen, “An Automated EM-Simulation Procedure for Generation of Monolithic Inductor Library,” in Proc. European Microwave Conference, vol. 2, pp. 4 , Oct. 2005. [5] Sidharth Dalmia, Joseph Martin Hobbs, Venky Sundaram et al., “Design and Optimization of High-Q RF Passives on SOP-Based Organic Substrate,” in Proc. IEEE Electronic Components and Technology Conference, pp. 495-503, 28-31 May 2002. [6] Maria del Mar Hershenson, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee, “Optimization of Inductor Circuits via Geometric Programming,” in IEEE Design Automation Conference, pp. 994-998, June 1999. [7] Rana J. Pratap, Saikat Sarkar, Stephane Pinel, Joy Laskar, and Gary S. May, “Modeling and Optimization of Multilayer LTCC Inductors for RF /Wireless Applications Using Neural Network and Genetic Algorithms,” IEEE Electronic Components and Technology Conference, vol. 1, pp. 248-254, June 2004. [8] Rong Jiang, Charlie Chung-Ping Chen, “ESPRIT: A Compact Reluctance Based Interconnect Model Considering Lossy Substrate Eddy Current,” in International Microwave Symposium (IMS), vol. 3, pp. 1385-1388, June 2004. [9] Guoan Zhong and Cheng-Kok Koh, “Exact Closed Form Formula for Partial Mutual Inductances of On-Chip Interconnects,” in Proc. IEEE International Conference on Computer Design, pp. 428-433, 16-18 Sept 2002. [10] Andreas Weisshaar, Hai Lan, Amy Luoh, “Accurate Closed-Form Expressions for the Frequency-Dependent Line Parameters of On-Chip Interconnects on Lossy Silicon Substrate,” IEEE Trans. on Advanced Packaging, vol. 25, issue 2, pp. 288-196, May 2002. [11] Niranjan A. Talwalkar, C. Patrick Yue, and S. Simon Wong, “Analysis and Synthesis of On-Chip Spiral Inductors,” IEEE Trans. on Electron Devices, vol. 52, No. 2, pp. 176-182, Feb. 2005. [12] Yong Zhan and Sachin S. Sapatnekar, “Optimization of Integrated Spiral Inductors Using Sequential Quadratic Programming,” IEEE Design Automation and Test in Europe, vol. 1, pp. 622-627, 16-20 Feb, 2004. [13] Arthur Nieuwoudt and Yehia Massoud, “Multi-level Approach for Integrated Spiral Inductor Optimization,” in Proc. IEEE Design Automation Conference 2005, pp.648-651, June 2005. [14] Peter Hagn, Andreas Przadka, Volker Gebhardt, Ulrich Bauernschmitt, “Ceramics: The Platform for Duplexers and Frontend-Modules,” IEEE Ultrasonics Symp., Vol. 1, pp.1-10, Oct. 2002. [15] Ali M. Niknejad, “Analysis, Simulation, and Applications of Passive Devices on Conductive Substrate,” PHD Thesis, Electrical Engineering and Computer Science, UC Berkeley, 2000. [16] F. W. Grover, Inductance Calculations, Working Formulas and Tables. New York: Van Nostrand, 1946. [17] David M. Pozar, Microwave Engineering, third edition, Wiley & Sons Inc., 2005. [18] K. B. Ashby, I. A. Koullias, W. C. Finley, J. J. Bastek, and S. Moinian, “High Q inductors for wireless applications in a complementary silicon bipolar process,” IEEE J. Solid-State Circuits, vol. 31, pp. 4-9, Jan. 1996. [19] C.P. Yue, “A physical model for planar spiral inductors on silicon,” IEEE Electron Devices Letters, vol. 43, pp.155-158, Dec. 1996. [20] A. E. Ruehli, “Inductance calculations in a complex integrated circuit environment,” IBM J. Res. Development, pp.470-481, Sept. 1972. [21] A. E. Ruehli and H. Heeb., “Circuit models for three-dimensional geometries includingdielectrics.” IEEE Trans. Microwave Theory Tech, vol. 40, pp.1507-1516, July 1992. [22] A. E. Ruehli, U. Miekkala, and H. Heeb., “Stability of discretized partial element equivalent efie circuit models,” IEEE Trans. Antennas and Propag., vol. 43, issue 6, pp. 553-559, June 1995. [23] A.E. Ruehli., “Equivalent circuit models for three-dimensional multiconductor systems.” IEEE Transactions on Microwave Theory and Techniques, vol. 22, issue 3, pp. 216-221, March, 1974. [24] M. Kamon, M. J. Ttsuk, and J. K. White., “Fasthenry: a multipole-accelerated 3-d inductance extraction program.” IEEE Transactions on Microwave Theory and Techniques, vol. 42, pp. 1750-1758, Sept. 1994. [25] Giulio Antonini, Mattia Di Prinzio, Alberto Petricola, and A. E. Ruehli, “Reduced Unknowns Meshing for the Partial Element Equivalent Circuit Approach,” International Symposium on IEEE Electromagneic Compatibility, vol. 3, pp 805-810, 8-12 Aug. 2005. [26] “Sequential Quadratic Programming,” http://wwwfp.mcs.anl.gov/otc/Guide/OptWeb/continuous/constrained/ nonlinearcon/section2 1 1.html. [27] C . Seguinot, P. Kennis, J. -F. Legier, F. Huret, E . Paleczny and L. Hayden, 'Multimode TRL—A new concept in microwave measurements: theory and experimental verification,' IEEE Trans. Microwave Theory and Tech., vol. 46, issue 5, pp. 536-542, May 1998. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/27546 | - |
dc.description.abstract | 在RF被動電路設計的過程當中,電感的設計往往是最難處理和最耗時的一個環節。除了考慮電感值之外,電感當中的各種寄生效應以及電感所佔的面積都必須納入考量。
為了解決以上的問題,這篇論文提出了一套電感合成與最佳化的方法. 這套方法可以根據使用者的需求,找出一個最佳的電感結構。在這篇論文裡,我們描述了平面型螺旋電感的各項電氣特性,也基於此建構了一個電感等效電路,並利用部分元素等效電路(Partial element equivalent circuit)的原理,開發了一個可以快速地計算出電感的各種電氣特性的模擬計算引擎。有了這個模擬引擎之後,我們將它配搭上最佳化的軟體工具,成功地開發出一套可以自動合成與最佳化平面型螺旋電感的軟體工具。 | zh_TW |
dc.description.abstract | In RF design, inductor design is often one of the most difficult and time consuming process. Aside from the desired inductance value, designers have to consider the quality factor, parasitic effects and also the total area.
In order to solve the problem mentioned on above, this thesis brings forward synthesis and optimization method which is capable to generate inductor’s physical parameters according to user’s specification. In this thesis, the electrical characteristics of an inductor and its loss mechanism are carefully analyzed. With the proper inductor equivalent circuit and partial element equivalent circuit (PEEC) method, we developed a simulation engine which is capable to predict the electrical characteristics of an inductor. The simulation engine is utilized and an optimization tool is developed based on the simulation engine. By combining the simulation engine and optimization software, we developed a tool that can automatically synthesis the inductor layout and optimize its parameters according to designer’s requirement. | en |
dc.description.provenance | Made available in DSpace on 2021-06-12T18:09:13Z (GMT). No. of bitstreams: 1 ntu-96-R94943161-1.pdf: 1278281 bytes, checksum: df38bffbf173c15a3657649ffc9f5a1e (MD5) Previous issue date: 2007 | en |
dc.description.tableofcontents | 誌謝 i
摘要 ii Abstract iii Table of Contents iv List of figures vi List of tables vii Chapter 1 Introduction 1 1.2 Literature Review 2 1.3 The introduction of BCB technology 5 1.3.1 Advantages of BCB technology 6 1.3.2 Disadvantages of BCB technology 7 1.4 The introduction of LTCC technology 7 1.4.2 Advantages of LTCC technology 9 1.4.3 Disadvantages of LTCC technology 10 1.5 Organization of this thesis 10 Chapter 2 Inductor model and its electrical characteristics 11 2.1 Introduction on planar spiral inductor 11 2.2 Inductance 12 2.3 Loss mechanism 14 2.3.1 Metal loss 15 2.3.2 Substrate loss 16 2.4 The electrical model of spiral inductor 17 2.5 Parameter extraction 19 2.6 Quality factor 21 Chapter 3 Methodology 23 3.1 Proposed method 23 3.2 Electrical parameters calculations for spiral inductor 25 3.2.1 Partial Element Equivalent Circuit 27 3.2.2 Self and mutual inductance formulas 29 3.2.3 Meshing strategy 30 3.2.4 Parasitic capacitance calculation 33 3.2.5 Solving the Equivalent Circuit 35 3.3 Optimization-Problem Formulation 38 3.3.1 Sequential Quadratic Programming 39 3.3.2 Implementation Details 40 Chapter 4 Simulation and experimental result 43 4.1 Measurement setup 44 4.2 Measurement results 45 4.3 Optimization result 49 4.4 Conclusion 54 Chapter 5 Conclusion 56 | |
dc.language.iso | en | |
dc.title | 平面型螺旋電感之合成與最佳化 | zh_TW |
dc.title | Synthesis and optimization of planar spiral inductor | en |
dc.type | Thesis | |
dc.date.schoolyear | 96-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 江介宏(Jie-Hong Jiang),林佑生(Yo-Shen Lin) | |
dc.subject.keyword | 低溫共燒陶瓷,電感,合成,最佳化, | zh_TW |
dc.subject.keyword | LTCC,inductor,synthesis,optimization, | en |
dc.relation.page | 59 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2007-11-27 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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