請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/27487完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林宗賢(Tsung-Hsien Lin) | |
| dc.contributor.author | Ching-Jen Tung | en |
| dc.contributor.author | 董景仁 | zh_TW |
| dc.date.accessioned | 2021-06-12T18:06:52Z | - |
| dc.date.available | 2012-01-10 | |
| dc.date.copyright | 2008-01-10 | |
| dc.date.issued | 2007 | |
| dc.date.submitted | 2007-12-28 | |
| dc.identifier.citation | [1] Federal Communications Commission:
http://wireless.fcc.gov/services/index.htm?job=service_home&id=medical_implant [2] B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Prentice Hall, 1998. [3] T. H. Lee, the Design of CMOS Radio-Frequency Integrated Circuits, 2nd ed. Cambridge, U.K.: Cambridge Univ. Press, 2004. [4] E. H. Armstrong, “Some recent developments of regenerative receivers,” Proc. IRE, vol. 10, pp. 244-260, Aug. 1922. [5] J. R. Whitehead, Super-Regenerative Receivers. Cambridge, U.K.: Cambridge Univ. Press, 1950. [6] A. Vouilloz, M. Declercq, and C. Deollain, “A low-power CMOS super-regenerative receiver at 1 GHz,” IEEE J. Solid-State Circuits, vol. 36, no. 3, pp.440-451, Mar. 2001. [7] J.-Y. Chen, M. P. Flynn, and J. P. Hayes, “A fully integrated auto-calibrated super-regenerative receiver in 0.13-μm CMOS,” IEEE J. Solid-State Circuits, vol. 42, pp. 1976-1985, Sept. 2007. [8] J.-Y. Chen, M. P. Flynn, and J. P. Hayes, “A fully integrated auto-calibrated super-regenerative receiver,” IEEE ISSCC Dig. Tech. Papers, pp.376-377, 2006. [9] T.-K. Nguyen, C.-H. Kim, and et al., “CMOS low-noise amplifier design optimization techniques,” IEEE Trans. Microwave Theory Tech., vol. 52, no. 5, May 2004. [10] Chipcon CC1100. Texas Instruments Inc. [Online]. Available: http://focus.ti.com/docs/prod/folders/print/cc1100.html [11] SmartRF studio. Texas Instruments Inc. [Online]. Available: http://focus.ti.com/docs/toolsw/folders/print/smartrftm-studio.html [12] Cyclone II FPGA starter development kit. Altera Corp. [Online]. Available: http://www.altera.com/products/devkits/altera/kit-cyc2-2C20N.html [13] Quartus II Software. Altera Corp. [Online]. Available: http://www.altera.com/support/software/sof-quartus.html [14] Linear Technology LT3020. Linear Technology Corp. [Online]. Available: http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1003,C1040,C1055,P2492,D2083 | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/27487 | - |
| dc.description.abstract | In this work, we adopt the super-regenerative receiver to implement the receiver for the Medical Implant Communications Service (MICS) applications. The receiver is designed to demodulate the on-off keying signal. The architecture is simple and consumes low power. The proposed topology incorporates digital circuits to generate the quench signal on chip. In addition, an open-loop frequency calibration loop is proposed to adjust the digitally-controlled oscillator frequency to the MICS band. Although a phase-locked loop can also lock the oscillator frequency and achieve precise frequency calibration, its locking time is long. This proposed frequency calibration loop can adjust the oscillator frequency in 4 μs; thus, it saves energy consumption.
Fabricated in a 0.18-μm CMOS process, the measurement results show the proposed topology dissipates 3.5 mA from a 1.5-V supply. The total calibration time is less than 20 μs. The receiver has a sensitivity of -83 dBm and a maximum data rate of 1 Mbps. The chip area of the fully-integrated super-regenerative receiver is 1.47 mm X 1.46 mm including pads. The core area is 0.9 mm X 1 mm. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-12T18:06:52Z (GMT). No. of bitstreams: 1 ntu-96-R94943011-1.pdf: 2622870 bytes, checksum: 8180bb0b53b7720773657809065eb53c (MD5) Previous issue date: 2007 | en |
| dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 1 1.2 Medical Implant Communications Service 2 1.3 Thesis Organization 2 Chapter 2 Introduction of Super-Regenerative Receiver 3 2.1 The Proposed Receiver Architecture 3 2.2 Theory of Super-Regenerative Receiver 5 2.2.1 Slope-Controlled State 7 2.2.2 Step-Controlled State 11 2.2.3 Modified Step-Controlled State 13 2.2.4 Operation Modes 15 Chapter 3 A Super-Regenerative Receiver Implementation 17 3.1 Super-Regenerative Receiver System Requirement 17 3.2 Super-Regenerative Receiver Building Block Design 18 3.2.1 Low-Noise Amplifier and Balun 20 3.2.2 Digitally-Controlled Oscillator 25 3.2.3 Envelope Detector 29 3.2.4 Calibration Loops 30 3.2.4.1 Q-Enhancement Loop 30 3.2.4.2 Frequency Calibration 32 3.2.4.3 Pulse-Width Adjustment Loop 38 3.2.5 Clock Generation 41 3.3 Simulation Results 41 Chapter 4 Measurement Results 43 4.1 Testing Setup 43 4.1.1 External Transmitter 44 4.1.2 Field-Programmable Gate Array 45 4.2 Printed Circuit Board Design 46 4.2.1 Chip Pin Configuration and PCB 46 4.2.2 Power Supply Generator 49 4.3 Experimental Results 50 4.3.1 Calibration Results 50 4.3.2 RX Selectivity 57 4.3.3 Bit Error Rate 58 4.4 Performance Summary 61 Chapter 5 Conclusions & Future Works 63 5.1 Conclusions 63 5.2 Future Works 63 | |
| dc.language.iso | en | |
| dc.subject | super-regenerative receiver | en |
| dc.title | 以CMOS 0.18微米製程實現400 MHz植入式醫療通訊系統之數位校正超再生接收機 | zh_TW |
| dc.title | A 400-MHz Super-Regenerative Receiver with Digital Calibration for MICS Applications in 0.18-μm CMOS Process | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 96-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 劉深淵(Shen-Iuan Liu),呂良鴻(Liang-Hung Lu),盧信嘉(Hsin-Chia Lu),曾英哲(Ying-Che Tseng) | |
| dc.subject.keyword | 超再生接收機, | zh_TW |
| dc.subject.keyword | super-regenerative receiver, | en |
| dc.relation.page | 66 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2007-12-28 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-96-1.pdf 未授權公開取用 | 2.56 MB | Adobe PDF |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。