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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/26053完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳德玉 | |
| dc.contributor.author | Yen-Tang Wang | en |
| dc.contributor.author | 王嚴堂 | zh_TW |
| dc.date.accessioned | 2021-06-08T06:59:15Z | - |
| dc.date.copyright | 2009-07-14 | |
| dc.date.issued | 2009 | |
| dc.date.submitted | 2009-06-30 | |
| dc.identifier.citation | [1] T.-H. Hsia, H.-Y. Tsai, Y.-Z. Lin, D. Chen, and W.-H. Chang, “Digital Compensation of a High-Frequency Voltage-Mode DC-DC converter,” in Proceedings of the 13th European Conference on Power Electronics and Applications (EPE 2007), Page(s): 1-8.
[2] C.-H. Chen, W.-H. Chang, D. Chen, P.-L. Tai, and C.-C. Wang, “Modeling of Digitally-Controlled Voltage-Mode DC-DC converters,” in Proceedings of the 33rd Annual Conference of the IEEE Industrial Electronics Society (IECON 2007), Page(s): 2005-2009. [3] Y.-Z. Lin, D. Chen, Y.-T. Wang, and W.-H. Chang, “A Novel Loop-gain Correction Method for Digitally Controlled DC-DC converters,” in Proceedings of the 1st Energy Conversion Congress and Exposition (ECCE 2009), will be published. [4] H. Al-Atrash, and I. Batarseh, “Digital Controller Design for a Practicing Power Electronics Engineer,” in Proceedings of the 22nd Applied Power Electronics Conference (APEC 2007), Page(s): 34-41. [5] M. M. Perez, and S.Ben-Yaakov, “ Time domain Design of Digital Compensators for PWM DC-DC converters,” in Proceedings of the 22nd Applied Power Electronics Conference (APEC 2007), Page(s): 887-893. [6] Y.-T. Chang and Y.-S. Lai, “Digital Controller Design for Buck Converter with the Reduction of Phase Transition and Output Voltage Oscillation under Transient State,” in Proceedings of the 4th Power Electronics, Machines and Drives (PEMD 2008), Page(s): 376-380. [7] C.-T. Chen, Linear System Theory and Design, 3rd ed., New York: Oxford, 1999. [8] H. S. Bae, J. H. Yang, J. H. Lee, and B. H. Cho, “Digital State Feedback Current Control using Pole Placement Technique for the 42V/14V Bi-Directional DC-DC converter Application,” in Proceedings of the 22nd Applied Power Electronic Conference (APEC 2007), Page(s): 3-7. [9] H. S. Bae, J. H. Yang, J. H. Lee, and B. H. Cho, “Digital State Feedback Control and Feed-Forward Compensation for a Parallel Module DC-DC converter using the Pole Placement Technique,” in Proceedings of the 23rd Applied Power Electronic Conference (APEC 2008), Page(s): 1722-1727. [10] A. Soto, P. Alou, and J. A. Cobos, “Analysis of the Buck Converter for Scaling the Supply Voltage of Digital Circuits,” IEEE Transactions on Power Electronics, vol. 22, no. 1, Page(s): 2432-2443, November 2007. [11] Texas Instruments, TMS320F2810, TMS320F2811, TMS320F2812, TMS320C2810, TMS320C2811, TMS320C2812 Digital Signal Processors Data Manual, Literature Number: SPRS174O, July 2007. [12] Texas Instruments, TMS320x281x DSP Analog-to-Digital Converter (ADC) Reference Guide, Literature Number: SPRU060D, July 2005. [13] Texas Instruments, TMS320x281x DSP System Control and Interrupts Reference Guide, Literature Number: SPRU078D, October 2006. [14] Spectrum Digital Incorporated, eZdspTM F2812 Technical Reference, Literature Number: 506265-0001 Rev. F, September 2003. [15] D. Chan, “ Power Electronics Lecture Note” , 2008. [16] M.-S. Chiang, “Digital Control Lecture Note” , 2008. [17] B. C. Kuo and M. F. Golnaraghi, Automatic Control Systems, 8th ed., John Wiley and Sons, 2003. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/26053 | - |
| dc.description.abstract | 對於未來中央處理器的電源供應而言，可程式化的輸出電壓及其變化率會是一種重要的需求。在這篇論文中，極點配置法將被用於設計直流/直流轉換器的數位補償器，以完成上述的功能。相關的等式已推導完成，控制器也已由數位訊號處理器實現。此外狀態估測器亦被用於估測電感電流，以減少偵測電流之電路成本。此理論將由設計範例和實驗結果來驗證。 | zh_TW |
| dc.description.abstract | In future CPU power supply applications, there is a requirement of target voltage level programmability with certain slew rate specifications. In this thesis, pole-placement method will be used to design a digital compensator for a DC-DC converter for this purpose. Equations were developed and the controller was implemented with a DSP. A state estimator was also used to estimate the inductor current so that current sensing can be avoided. Examples will be given for the design and experimental results will be presented. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T06:59:15Z (GMT). No. of bitstreams: 1 ntu-98-R96921018-1.pdf: 2549203 bytes, checksum: a1212e80ebb3dee20cb2ce2ae05e5a60 (MD5) Previous issue date: 2009 | en |
| dc.description.tableofcontents | Acknowledgements (Traditional Chinese).........................................................................I
Abstract (Traditional Chinese).........................................................................................III Abstract...........................................................................................................................IV List...................................................................................................................................V List of Figures.................................................................................................................VII List of Tables....................................................................................................................X Chapter 1 Introduction.......................................................................................................1 Chapter 2 System Descriptions of a Buck Converter with a Digital Feedback Controller.......................................................................................................3 2.1 Digital Control System for Buck Converter....................................................3 2.1.1 Power Stage..........................................................................................4 2.1.2 Analog-to-Digital Converter (ADC).....................................................5 2.1.3 Digital Pulse-Width-Modulator (DPWM)............................................8 2.1.4 Limitation of DPWM Resolution.........................................................8 2.2 S-Domain Control Model................................................................................9 2.3 Z-Domain Design Approaches to a Digital Compensator.............................12 Chapter 3 Appling Pole-Placement Method to the Digital Compensator for a DC-DC Converter.....................................................................................................15 3.1 Linear System Equivalence of a Buck Converter in State Variables Format..........................................................................................................15 3.2 Review of Pole-Placement.............................................................................18 3.2.1 Tracking..............................................................................................18 3.2.2 State Feedback....................................................................................19 3.2.3 State Estimator....................................................................................21 3.2.4 Combination of Tracking, State Feedback, and State Estimator........22 3.3 Design Steps for Using Pole-Placement Method for the Design of Digital Compensator of a DC-DC Converter...........................................................23 VI Chapter 4 Design Procedure and Experimental Results..................................................30 4.1 Descriptions of Hardware..................................................................................30 4.1.1 Description of Hardware TMS320F2812...........................................30 4.1.2 Settings of ADC of TMS320F2812....................................................36 4.1.3 Description of Hardware eZdspTM F2812...........................................40 4.2 Design Examples 1............................................................................................42 4.2.1 Design Procedure of Design Example 1.............................................42 4.2.2 Experimental Results of Design Example 1.......................................46 4.3 Design Example 2 (Much Faster Settling time).................................................56 4.4 Design Example 3 (Overshoot in Step Response).............................................60 4.5 Limitation of Pole-Placement Method for Buck Converter...............................62 4.6 Design Consideration for Load Resistance and Input Voltage Variation..........65 Chapter 5 Conclusions and Future Researches................................................................67 References.......................................................................................................................69 | |
| dc.language.iso | en | |
| dc.title | 極點配置法於可程式化之直流/直流轉換器的數位補償器設計之應用 | zh_TW |
| dc.title | Application of Pole-Placement Method to the Design of a Digital Compensator for Programmable DC-DC Converters | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 97-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 劉志文,陳耀銘 | |
| dc.subject.keyword | NULL | en |
| dc.relation.page | 70 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2009-06-30 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位： | 電機工程學系 | |
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