應用低溫共燒陶瓷製程之適用晶片中廣域連結的分析與量測

Abstract

本論文以系統晶片封裝的觀點做出發，並且應用低溫共燒陶瓷的製程解決晶片中廣域連結的傳輸問題，利用低溫共燒陶瓷的多層結構，使得晶片設計者可以設計符合自己所需特性阻抗的傳輸線，並且透過封裝中較低的衰減係數與低頻時相較於晶片中窄導體有較高相速度的特性得到較佳的傳輸效能與較低的功率消耗。

This thesis is based on the concept of the System in Package to solve the problem of transmission of intra-chip or inter-chip global interconnect by using the LTCC (low temperature co-fired ceramic) process. By using the multilayer structure of LTCC, the chip designer can easily design the transmission line with characteristic impedance he needs. He can also get a better transmission efficiency and low power consumption because of lower attenuation constant and higher phase velocity compared with the narrow metal on chip in low frequency of the on package transmission line.