請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/24247完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 盧信嘉 | |
| dc.contributor.author | Chye-Shyun Wong | en |
| dc.contributor.author | 黃奇順 | zh_TW |
| dc.date.accessioned | 2021-06-08T05:19:37Z | - |
| dc.date.copyright | 2005-08-01 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2005-07-28 | |
| dc.identifier.citation | [1] Arya R. Behzad, “A 5-GHz Direct-Conversion CMOS Transceiver Utilizing Automatic Frequency Control for the IEEE 802.11A Wireless LAN Standard,” IEEE Journal of Solid-State Circuits, Vol. 38, No. 12, pp. 2209-2219, Dec. 2003.
[2] Kyutae Lim, Stephane Pinel, Mekita Davis, Albert Sutono, Chang-Ho Lee, Deukhyoun Heo, Ade Obatoynbo, Joy Laskar, Emmanouil M. Tantzeris, and Rao Tummala, “RF-System-On-Package (SoP) for Wireless Communications,” IEEE Microwave Magazine, pp. 88-99, March 2002. [3] R.V. Nee and R. Prased, OFDM Wireless Multimedia Communication, Artch House, 2000. [4] Masound Zargari, David K. Su, Patrick Yue, Shahriar Rabii, David Weber, Brian J. Kaczynski, Srenik S. Mehta, Kalwant Singh, Sunetra Mendis, and Bruce A. Wooley, “A 5-GHz CMOS Transceiver for IEEE 802.11a Wireless LAN Systems,” IEEE J. Solid-State Circuits, Vol. 37, No. 12, pp.1688-1694, Dec. 2002. [5] Guillermo Gonzalez, Microwave Transistor Amplifiers Analysis and Design, Prentice Hall, 1984. [6] Sowlati, T., and Leenaerts, D.M.W, “A 2.4-GHz 0.18-/spl mu/m CMOS self-biased cascode power amplifier,” IEEE Journal of Solid-State Circuits, Vol. 38, No. 8 , pp. 1318 – 1324, Aug. 2003. [7] YunSeong Eo, and KwangDu Lee, “A Fully Integrated 24-dBm CMOS Power Amplifier for 802.11a WLAN Applications,” IEEE Microwave and Wireless Components Letters, Vol. 14, No. 11, pp. 504-506, Nov. 2004. [8] Chia-Hung Tsen, and Chung-Yu Wu, “The Design of A 5.25GHZ CMOS Linear Power Amplifier,” National Chiao Tung University, Nanoelectronics and Gigascale Systems Laboratory MSc Thesis, pp. 213. 2003. [9] Wang, W., and Zhang, Y.P. “0.18-um CMOS Push-Pull Power Amplifier With Antenna in IC Package,” IEEE Microwave and Wireless Components Letters, Vol. 14, No. 1, pp.13 –15, Jan. 2004. [10] http://microwave.ee.cuhk.edu.hk/microwave/www_mwave/Research_LTCC.html. [11] http://www.rfintc.com/pdf_file/AP2085.pdf. [12] http://www.anadigics.com. [13] http://www.airoha.com.tw/wireless.htm. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/24247 | - |
| dc.description.abstract | 本篇論文主旨在於實現適用於IEEE 802.11a 無線區域網路系統的功率放大器，在論文中的電路設計分為兩大部分，包括了CMOS 製程的放大電路和其外部匹配電路。其中CMOS 製程的放大電路採用台積電標準0.18微米1P6M互補式金氧半導體的製程來實現，而外部匹配電路則採用低溫共燒陶瓷技術(LTCC)實現。
本研究採用差動且自我偏壓的方式解決功率放大器操作在23.2dBm的功率下時會面臨的崩潰現象和熱載子現象，進而提高其可靠度。為了增加被動電路的Q值以增加整顆功率放大器的效率，本研究採用LTCC來實現外部匹配電路, 而且外部電路用LTCC取代PCB板的設計在未來可將整顆功率放大器整個為一SOP。另一方面，為了提高此功率放大器與中頻，低頻電路的整合，本研究採用TSMC提供之RF標準電晶體模型，且電壓定於1.8V。 | zh_TW |
| dc.description.abstract | The purpose of this thesis is to present a power amplifier which can be used in WLAN 802.11a system. Two major parts are included, the first part is power amplifier chip implemented by CMOS process while the other part is the output matching network. The amplifier chip is implemented by TSMC 0.18um CMOS process, and the output matching network is implemented by low temperature co-fired ceramic (LTCC) process.
We adopt differential self-biased topology in the power amplifier to overcome the problems of hot carrier effect and break down effect when the power amplifier is operating in 23.2dBm output power. Accordingly, the differential self-biased topology can improved the reliability of power amplifier significantly. Moreover, the output matching network which implemented by LTCC, with inherently high Q factor, can improved the efficiency of the total power amplifier. The replacement of PCB board discrete passive components with LTCC will allow the realization the concept of SOP (System on Package) in the near future. Furthermore, the implementation of power amplifier with TSMC 0.18μm CMOS process and with DC voltage of 1.8V makes it possible to integrate the IF and base-band circuits in a single chip. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T05:19:37Z (GMT). No. of bitstreams: 1 ntu-94-R92943102-1.pdf: 3016886 bytes, checksum: 5477e58eb42e3bed3c6c5a12eab8b864 (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | List of Figures vi
List of Tables vii CHAPTER 1 Introduction 1 1.1 WLAN Communication Architecture 1 1.2 SOC for WLAN Communication System 2 1.3 Introduction of LTCC 3 1.3.1 Fabrication process 3 1.3.2 Materials used 4 1.3.3 Advantages 4 1.3.3.1 Cost reduction 4 1.3.3.2 Reduction in size 5 1.3.3.3 Low loss at microwave frequency 5 1.3.3.4 Stable dielectric constant with respect to frequency 5 1.3.4 RF system on package (SOP) for wireless communications. 5 1.3.4.1 Advantages 6 1.4 Overview 7 CHAPTER 2 Power Amplifier Specification 9 2.1 IEEE 802.11a Specification Review 9 2.1.1 Introduction of orthogonal frequency division multiplexing (OFDM). 9 2.1.2 OFDM used in 802.11a 12 2.2 Receiver and Transmitter Specification in 802.11a 13 2.3 Basic Concepts in RF Design 15 2.3.1 Power gain 15 2.3.2 1-dB compression point 15 2.3.3 Third-order interception point 17 2.3.4 Return loss and isolation 20 2.3.5 Stability 21 CHAPTER 3 CMOS Power Amplifier for 802.11a WLAN Application 23 3.1 Previous art 23 3.2 Research Motivation 23 3.3 Self-biased Configuration 24 3.4 Power Amplifier Design 31 3.4.1 Transistors cell size selection 32 3.4.2 DC biasing of self-biased stage 33 3.4.3 Input matching network 33 3.4.4 First driver stage power amplifier 34 3.4.5 Inter-stage matching network 34 3.4.6 Second power stage power amplifier 34 3.4.7 Output matching network 35 CHAPTER 4 The Matching Network Design in LTCC 37 4.1 LTCC Description 37 4.2 Output Matching Network Design 37 4.2.1 Capacitor 39 4.2.2 Inductor 40 4.2.3 Complete output matching network 42 4.3 Bond-wire Modeling 44 CHAPTER 5 Simulation Results and Measurement Procedures 45 5.1 Simulation Results 45 5.1.1 Scattering parameters 45 5.1.2 Stability 47 5.1.3 Simulation results for large signal 47 5.1.4 Power add efficiency (PAE) 49 5.1.5 Performance to be expected 50 5.1.6 Performance comparison 50 5.2 Complete Layout 51 5.3 Measurement Procedures 52 5.3.1 Small signal measurement 53 5.3.2 Large signal measurement 53 CHAPTER 6 Conclusion 57 References 58 | |
| dc.language.iso | en | |
| dc.subject | 放大器 | zh_TW |
| dc.subject | Power Amplifier | en |
| dc.title | 應用於802.11a無線射頻系統之CMOS 功率放大器設計 | zh_TW |
| dc.title | The Design of a CMOS 5.25GHz Differential Power Amplifier for 802.11a WLAN System | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 93-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 瞿大雄,毛紹網 | |
| dc.subject.keyword | 放大器, | zh_TW |
| dc.subject.keyword | Power Amplifier, | en |
| dc.relation.page | 58 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2005-07-28 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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