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標題: | 建立於可重組化架構電路之大型矩陣乘法器容錯設計 Fault Tolerant Design for Large Scale Matrix Multiplier Based on Reconfigurable Architecture |
作者: | Bo-Yu Jan 詹博宇 |
指導教授: | 黃俊郎 |
關鍵字: | 容錯設計,矩陣運算,可重組化架構, fault tolerant design,matrix multiplication,reconfigurable architecture, |
出版年 : | 2011 |
學位: | 碩士 |
摘要: | 矩陣乘法在許多研究與工程問題上扮演極重要的角色。在二維處理單元陣列(2-dimensional PE array)上實現矩陣乘法,藉由提高運算平行度以縮短計算時間是相當有效的做法。然而,隨著處理單元陣列的單元數增加,整個乘法器的可靠度也會隨之下降。
這篇論文針對在二維處理單元陣列上實現的Canon演算法提出三個藉由陣列重組化以提高容錯能力的技術。技術一略過故障的運算單元,並在原陣列中找出一個足夠大小但未必連續的子陣列;此技術也可用來在大陣列上執行較小的矩陣乘法。技術二採用優雅降級機制(graceful degradation),其原理是利用正常的單元來執行原應在錯誤單元上執行的運算,代價則是較長的運算時間。此技術也可用來在小陣列上執行較大的矩陣乘法。第三個技術結合上兩個技術,在容錯與運算速度之間提供一個更好的平衡。 以Canon演算法為基礎,我們設計可以實現上述三種容錯機制的運算單元陣列;此外,我們也將重組化與運算單元指令產生的過程自動化。 Matrix multiplication is a fundamental and important operation in many research and engineering problems. Enhancing matrix multiplication parallelism in a 2-dimensional PE (processing element) array is a popular approach to improve the computation efficiency. However, as the size of PE array increases, the multiplier reliability degrades. This thesis proposes a coarse-grained reconfigurable PE array architecture to improve the reliability of a Canon matrix multiplier that utilizes a 2D PE array. Three fault tolerance schemes are proposed in this thesis. The first scheme bypasses the faulty PE’s and allocates the desired PE array size to achieve the given multiplication; this also enables one to multiply smaller matrices with a large PE array. The second scheme achieves graceful degradation. The work associated with a faulty PE is performed by its adjacent fault-free PE; this, in practice, also allows one to perform large matrix multiplication in a small PE array. The last hybrid scheme combines the previous two; it provides the best flexibility in terms of fault tolerance and computation efficiency. Based on the Canon’s algorithm, we implement the proposed fault-tolerant reconfigurable multiplier as well as the software components that compute the PE array configurations and generate the execution sequences for each PE elements. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/22776 |
全文授權: | 未授權 |
顯示於系所單位: | 電機工程學系 |
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