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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/22398完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 劉致為 | |
| dc.contributor.author | Wei-Chiang Chang | en |
| dc.contributor.author | 張暐強 | zh_TW |
| dc.date.accessioned | 2021-06-08T04:16:56Z | - |
| dc.date.copyright | 2011-09-18 | |
| dc.date.issued | 2011 | |
| dc.date.submitted | 2011-08-29 | |
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Bertagnolli, “Stabilization of a very high-k crystalline ZrO2 phase by post deposition annealing of atomic layer deposited ZrO2/La2O3 dielectrics on germanium,” Applied Surface Science, vol. 256, Jun. 2010, pp. 5031-5034. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/22398 | - |
| dc.description.abstract | 在光電產業中，鍺元素因其相對於矽較小的能隙(Bandgap)，能更有效的吸收遠紅外光，因而在三五太陽能電池中也扮演著非常重要的角色。因此，鍺的表面鈍化(Surface passivation)技術也變得相當重要，而二氧化鍺因為可以有效的減少界面缺陷(Interface defect)及固定電荷(Fixed charge)，被認為是一個非常合適於鈍化鍺表面的材料。在此實驗中，鍺金氧半電容原件被製造來幫助我們區分影響光激發螢光量測的兩個因素：(1) 界面缺陷及(2) 固定電荷。另一方面，在電性量測中，可以發現在常溫中電容因頻率改變而導致的變動非常小，表示我們的二氧化鍺鈍化層有很好的品質和界面特性。最後憑藉high-low frequency capacitance method的計算，我們可以發現成長5小時的二氧化鍺與鍺的界面有著最小的界面陷阱濃度，約為約為1.8*10^11 cm-2eV-1。
憑藉著鋁/二氧化鍺/鍺金氧半原件的電性量測(C-V measurement)，包含frequency dispersion、hysteresis和stretch-out behavior，並期望可以完整的了解這些與成長二氧化鍺相關的缺陷對於電性量測的影響及其來源，不幸的，仍有一些現象無法被很好的解釋，並需要更進一步的研究來幫助我們。 透過Material Studio軟體的模擬，我們可以依照first-principle原理來導出在二氧化鍺中各種不同價電的氧缺陷之轉化能級(transition level)。其中(+2/0)代表著在二氧化鍺中有正價電固定電荷的存在，因為其轉化能級的位置離費米能級(Fermi level)相對很遠。而(+1/0)則代表著二氧化鍺的正電荷抓陷中心(hole trap center)非常靠近鍺的價帶(Valence band)，提供了直接穿透(direct tunneling)所造成的滯留現象(hysteresis)一個非常有效的解釋。另一方面，二氧化鍺界面陷阱的來源也被解釋的非常清楚，來自不同氧化數的鍺所形成之懸盪鍵(dangling baond)提供了不同能級的界面陷阱。 低等效氧化層厚度(EOT)金氧半原件是一直以來半導體產業追求的目標；在此實驗中，我們利用擁有較高介電係數的三氧化二鑭(La2O3)來替代二氧化鍺鈍化層，並伴隨著由基材擴散而來的鍺介入而轉化成的超高介電係數正方晶相二氧化鋯(tetragonal ZrO2)，成功的將等效氧化層厚度降低至約1.4 奈米等級。此外，如果氧化層沉積後有經過攝氏六百度的退火處理(Post-deposition-annealing)，我們元件的等效氧化層厚度可以更進一步的降低到約1.1奈米，但經過攝氏五百度的退火處理的元件擁有最好的量測電性。 | zh_TW |
| dc.description.abstract | In photovoltaic industry, Ge material also plays an important role for III-V solar cells since Ge with smaller band-gap than Si is used as the bottom junction to absorb the infrared (IR) light, so the Ge layer passivation becomes more important. GeO2 is a considered a suitable material to passivate the surface due to the reducing the interface defect density (Dit) and positive fixed charge. The metal oxide semiconductor (MOS) capacitors were fabricated to help separate these two factors, which also shows almost no frequency dispersion from 1 K to 1 MHz at room temperature. The minimum value of Dit with 5 hour oxidation treatment is obtained around 1.8*10^11 cm-2eV-1 by high-low frequency capacitance method.
Al/GeO2/Ge MOSCAPs were fabricated to investigate the C-V performance, including frequency dispersion (in both accumulation and strong inversion region), hysteresis and stretch-out behavior, expecting to fully understand the C-V distortion induced by defect states related to the growth of GeO2. Unfortunately, some of the characters still need continuing studies to further understand them. With the help of MS, the transition levels of oxygen vacancy (Vo) in GeO2 with different charge state are calculated by first principle method. The formation energy of GeO2 indicate there is a (+2/0) fix charge state in bulk GeO2. The (+1/0) transition level which near the Ge valence band maximum shows positive charge trap of GeO2. The hysteresis of CV measured by different extent of Vg sweep shows a negative VFB shift which corresponds to the positive charge trap as theoretical calculation implies. And the interface trap states level were also calculated to originate from Ge dangling bonds with different oxidation number, namely, Ge1+, Ge2+ for the states near Ec and Ge0+ correspond to the states near Ev. For which need more investigation to prove. Low EOT MOSCAP was successfully fabricated by using La2O3 as an alternative passivation layer, and with the very high-k tetragonal ZrO2 originated from the incorporation of Ge ion, which is regarded to diffuse from the beneath Ge substrate with the help of high-temperature post-deposition-annealing (PDA). The measured CET is scaled to about 1.4 nm for Pt/ZrO2/La2O3/p-Ge MOSCAP without any annealing process, and is dramatically decrease to about 1.1 nm for Pt/ZrO2/La2O3/p-Ge MOSCAP with 600°C PDA, whereas the MOSCAP with 500°C PDA has the best C-V performance. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T04:16:56Z (GMT). No. of bitstreams: 1 ntu-100-R98941002-1.pdf: 4674441 bytes, checksum: 2e164c21c476a4cce21b576878e2497a (MD5) Previous issue date: 2011 | en |
| dc.description.tableofcontents | Contents
Chapter 1 Introduction 1.1 Background and Motivation 1 1.2 Thesis organization 6 References 7 Chapter 2 PL enhancement of Ge by GeO2 passivation 2.1 Introduction 8 2.2 Experiments 10 2.3 Photoluminescence of GeO2 passivated p-Ge 11 2.4 Al/GeO2/p-Ge MOSCAPs Analysis 14 2.4.1 Al/GeO2/p-Ge MOSCAPs Analysis — Density of Interface Trap 15 2.4.2 Al/GeO2/p-Ge MOSCAPs Analysis — Density of Fixed Charge 17 2.4.3 Al/GeO2/p-Ge MOSCAPs Analysis — MS Simulation 21 2.4.4 Al/GeO2/p-Ge MOSCAPs Analysis — Conclusion 23 2.5 Material Properties of GeO2/p-Ge 2.5.1 Transmission Electron Microscopy 25 2.5.2 Atomic Force Microscopy 29 2.5.3 X-Ray Photoelectron Spectroscopy 32 2.6 Photoluminescence of GeO2/p-Ge with GeO2 grown by RTA 34 2.7 Al/GeO2/n-Ge MOSCAPs Analysis 35 2.8 Summary 37 References 38 Chapter 3 GeO2/Ge based MOSCAPs Characterization 3.1 Introduction 41 3.2 Al/GeO2/Ge MOSCAPs Character — Interface Traps 3.2.1 Overview of Conductance method 43 3.2.2 GeO2/Ge Interface Characterization —RT Conductance method 48 3.2.3 GeO2/Ge Interface Characterization —MS Simulations 52 3.2.4 GeO2/Ge Interface Characterization — Conclusion 55 3.3 Al/GeO2/Ge MOSCAPs Character —Hysteresis Voltage 3.3.1 Introduction of Border Traps 56 3.3.2 Multi-Frequency Hysteresis Voltage 58 3.3.3 Hysteresis Voltage Measurement — Vg sweep extension 60 3.3.4 Material Studio Simulation and Conclusion 61 3.4 Al/GeO2/Ge MOSCAPs Character —Minority Carrier Response 64 3.5 MOSCAPs with Al/Pt Gate Metal 65 3.6 Summary 69 Reference 70 Chapter 4 Low EOT MOS with La2O3 passivation layer 4.1 Introduction 76 4.2 Al/ZrO2/GeO2 MOSCAP s Character 4.2.1 Al/ZrO2/GeO2/p-Ge MOSCAPs Fabrication 80 4.2.2 Al/ZrO2/GeO2-furnace/p-Ge MOSCAPs Characterization 81 4.2.3 Al/ZrO2/GeO2-RTA/p-Ge MOSCAPs Characterization 87 4.3 Pt/ZrO2/La2O3/Ge MOSCAPs Character 4.3.1 ZrO2/La2O3 based MOSCAPs introductions 90 4.3.2 Pt/ZrO2/La2O3/p-Ge MOSCAPs Fabrication 93 4.3.3 Pt/ZrO2/La2O3/p-Ge MOSCAPs Character 94 4.3.4 Pt/ZrO2/La2O3/p-Ge MOSCAPs — Effect of PDA 95 4.4 Summary 99 Reference 100 Chapter 5 Summary and Future Work 5.1 Summary 105 5.2 Future Works 107 | |
| dc.language.iso | en | |
| dc.subject | 二氧化三鑭 | zh_TW |
| dc.subject | 氧化鍺鈍化 | zh_TW |
| dc.subject | 超薄等效氧化層 | zh_TW |
| dc.subject | 二氧化鋯 | zh_TW |
| dc.subject | GeO2 passivation | en |
| dc.subject | La2O3 | en |
| dc.subject | ZrO2 | en |
| dc.subject | low EOT | en |
| dc.title | 二氧化鍺鈍化層之研究與超薄等效氧化層之鍺金氧半元件製備 | zh_TW |
| dc.title | GeO2 Passivation Layer Investigation and the Fabrication of Ultra-Low EOT Ge MOSCAPs | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 99-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 胡振國,郭宇軒,林中一,林吉聰 | |
| dc.subject.keyword | 氧化鍺鈍化,超薄等效氧化層,二氧化鋯,二氧化三鑭, | zh_TW |
| dc.subject.keyword | GeO2 passivation,low EOT,ZrO2,La2O3, | en |
| dc.relation.page | 108 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2011-08-29 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
| 顯示於系所單位： | 光電工程學研究所 | |
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