20 MHz LTE封包追蹤技術之CMOS電源供應調變器

Abstract

隨著可攜式電子產品蓬勃的發展，例如可攜式電話、行動電視、數位相機和個人數位助理…等，這些可攜式裝置皆是以電池為供電來源，而電池的使用時間是使用者相當在意的特性，因此，如何有效使用和分配電池有限能量是電源管理系統重要的課題。無線通訊系統上逐漸增長的能耗問題，主要原因來自於行動通訊裝置的高數據速率以及大頻寬。無線通訊系統中，例如:寬頻分碼多工(WCDMA)和長期演進技術(LTE)，射頻功率放大器在通訊系統中為主要的耗能來源之一，而為了降低功率放大器的能源損耗，最廣為人知的方法是利用電源供應調變器追蹤射頻訊號封包並且提供相對應的供應電壓給予功率放大器做使用，因此將使得整體功率放大器的效率提升。這個方法名為封包追蹤技術。 本論文提出的電源供應調變器電路主要包含兩個部分，第一部分是使用兩個切換式轉換器用來提供低頻訊號功率，此電路可提升轉換器的輸出電流，並且降低對於線性放大器的電流需求。第二部分則是使用線性放大器用來提供高頻訊號功率，此電路可提供高頻寬以及降低輸出雜訊。 本論文使用0.35微米互補式金屬氧化物半導體製程實現，晶片面積為1.51×1.05 mm2。追蹤的訊號為1/5/10/20 MHz之弦波及20 MHz LTE之封包訊號，可操作的輸出電壓範圍為0.4 ~3.9 V，可達到的效率為82.3 %。

With the growing development for portable devices, such as cellular phones, mobile TV, camera recorder and PDAs, these portable devices use battery as the power source and customers are concerned about the battery life. As a result, how to use the battery energy efficiently is the most concerned problem. There has been an increasing power consumption concern for wireless communication. One of the major reasons is the demand for higher data rates and wider bandwidth in portable devices. The power amplifier (PA) is a main part, which accounts for a major portion of the power consumption in wireless communication systems, (e.g., wideband code-division multiple access (WCDMA), and long-term evolution (LTE)). To reduce power dissipation in these power amplifiers, one promising solution is to employ a supply modulator (SM) that tracks the envelope of the RF input and modulates the PA supply voltage accordingly. Therefore, it can improve the whole efficiency of PA. This technique is known as envelope-tracking (ET) technique. In this thesis, the supply modulator includes two parts. First part is the dual-switching converter, which provides low frequency content of the envelope waveform, increases the output current of the switching converter, and decreases the current demand from the linear amplifier. The additional linear amplifier provides high frequency content of the envelope waveform, which has high bandwidth and low output noise. The chip is fabricated in a 0.35 μm CMOS process, and its size is 1.51×1.05 mm2. The test signals are 1/5/10/20 MHz sine waves and 20 MHz LTE envelope. The output voltage range and the peak efficiency are 0.4 ~3.9 V and 82.3 %, respectively.