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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/20707完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 劉致為 | |
| dc.contributor.author | Chih-Chiang Chang | en |
| dc.contributor.author | 張志強 | zh_TW |
| dc.date.accessioned | 2021-06-08T02:59:40Z | - |
| dc.date.copyright | 2017-08-01 | |
| dc.date.issued | 2017 | |
| dc.date.submitted | 2017-07-27 | |
| dc.identifier.citation | Chapter.1
[1] A. Steegen et al., “Technology Options at the 5 Nanometer Node” IEDM short course, 2016. [2] Wirths, Stephan, et al. 'Lasing in direct-bandgap GeSn alloy grown on Si.' Nature photonics 9.2 (2015): 88-92. [3] G. E. Moore, “Cramming more components onto integrated circuits (Reprinted from Electronics, pg 114-117, April 19, 1965),” Proc. IEEE, vol. 86, no. 1, pp. 82-85, Jan, 1998. [4] R. Arghavani et al., “Low Resistance Contacts to Enable 5 nm Node Technology” IEDM short course, 2016. [5] Mistry, Kaizad, et al. 'A 45nm logic technology with high-k+ metal gate transistors, strained silicon, 9 Cu interconnect layers, 193nm dry patterning, and 100% Pb-free packaging.' Electron Devices Meeting, 2007. IEDM 2007. IEEE International. IEEE, 2007. [6] Auth, Chris, et al. 'A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors.' VLSI technology (VLSIT), 2012 symposium on. IEEE, 2012. [7] Coquand, Remi, et al. 'Strain-induced performance enhancement of trigate and omega-gate nanowire FETs scaled down to 10-nm width.' IEEE Transactions on Electron Devices 60.2 (2013): 727-732. Chapter.2 [1] Gupta, Suyog, et al. 'GeSn technology: Extending the Ge electronics roadmap.' Electron Devices Meeting (IEDM), 2011 IEEE International. IEEE, 2011. [2] Wirths, Stephan, et al. 'High-k gate stacks on low bandgap tensile strained Ge and GeSn alloys for field-effect transistors.' ACS applied materials & interfaces 7.1 (2014): 62-67. [3] Tonkikh, Alexander A., et al. 'Pseudomorphic GeSn/Ge (001) quantum wells: Examining indirect band gap bowing.' Applied Physics Letters 103.3 (2013): 032106. [4] Gupta, Suyog, et al. 'Achieving direct band gap in germanium through integration of Sn alloying and external strain.' Journal of Applied Physics 113.7 (2013): 073707. [5] Lan, H-S., and C. W. Liu. 'Ballistic electron transport calculation of strained germanium-tin fin field-effect transistors.' Applied Physics Letters 104.19 (2014): 192101. [6] Yeo, Yee-Chia, et al. 'Germanium-based transistors for future high performance and low power logic applications.' Electron Devices Meeting (IEDM), 2015 IEEE International. IEEE, 2015. [7] Huang, Wenqi, et al. 'Comparative studies of band structures for biaxial (100)-,(110)-, and (111)-strained GeSn: A first-principles calculation with GGA+ U approach.' Journal of Applied Physics 118.16 (2015): 165704. [8] Wirths, Stephan, et al. 'Lasing in direct-bandgap GeSn alloy grown on Si.' Nature photonics 9.2 (2015): 88-92. [9] Wirths, S., et al. 'Tensely strained GeSn alloys as optical gain media.' Applied physics letters 103.19 (2013): 192110. [10] Gallagher, J. D., et al. 'Electroluminescence from GeSn heterostructure pin diodes at the indirect to direct transition.' Applied Physics Letters 106.9 (2015): 091103. [11] Gupta, Jay Prakash, et al. 'Infrared electroluminescence from GeSn heterojunction diodes grown by molecular beam epitaxy.' Applied Physics Letters 102.25 (2013): 251117. [12] Chen, Miin-Jang, et al. 'Electroluminescence and photoluminescence studies on carrier radiative and nonradiative recombinations in metal-oxide-silicon tunneling diodes.' Journal of applied physics 93.7 (2003): 4253-4259. [13] Liao, M. H., T-H. Cheng, and C. W. Liu. 'Infrared emission from Ge metal-insulator-semiconductor tunneling diodes.' Applied physics letters 89.26 (2006): 261913. [14] Jan, S-R., et al. 'Influence of defects and interface on radiative transition of Ge.' Applied Physics Letters 98.14 (2011): 141105. [15] Chen, Robert, et al. 'Material characterization of high Sn-content, compressively-strained GeSn epitaxial films after rapid thermal processing.' Journal of Crystal Growth 365 (2013): 29-34. [16] Shang, Colleen K., et al. 'Dry-wet digital etching of Ge1− xSnx.' Applied Physics Letters 108.6 (2016): 063110. [17] Hart, John, et al. 'Temperature varying photoconductivity of GeSn alloys grown by chemical vapor deposition with Sn concentrations from 4% to 11%.' Journal of Applied Physics 119.9 (2016): 093105. [18] Aella, P., et al. 'Optical and structural properties of SixSnyGe1−x−y alloys.' Applied physics letters 84.6 (2004): 888-890. [19] Afanas’ ev, V. V., et al. 'Band alignments in metal–oxide–silicon structures with atomic-layer deposited Al2O3 and ZrO2.' Journal of applied physics 91.5 (2002): 3079-3084. Chapter.3 [1] Yahyaoui, N., et al. 'Wave-function engineering and absorption spectra in Si0.16Ge0.84/Ge0.94Sn0.06/Si0.16Ge0.84 strained on relaxed Si0.10Ge0.90 type I quantum well.' Journal of Applied Physics 115.3 (2014): 033109. [2] Genquan Han et al., in Proceedings of the IEDM Technical Digest International Electron Devices, 2011 (IEEE, Washington, DC, 2011), p. 402 [3] Mingshan Liu et al., in 2014 Symposium on VLSI Technology Digest of Technical Papers (IEEE, Honolulu, HI), p. 80. [4] Noori, Atif M., et al. 'Manufacturable Processes for < 32-nm-node CMOS Enhancement by Synchronous Optimization of Strain-Engineered Channel and External Parasitic Resistances.' IEEE Transactions on Electron Devices 55.5 (2008): 1259-1264.. [5] Nishimura, Tomonori, Koji Kita, and Akira Toriumi. 'Evidence for strong Fermi-level pinning due to metal-induced gap states at metal/germanium interface.' Applied Physics Letters 91.12 (2007): 123123. [6] Li, H., et al. 'Electrical characteristics of Ni Ohmic contact on n-type GeSn.' Applied Physics Letters 104.24 (2014): 241904. [7] Zhang, Xu, et al. 'Formation and characterization of Ni/Al Ohmic contact on n+-type GeSn.' Solid-State Electronics 114 (2015): 178-181. [8] Dormaier, Robert, and Suzanne E. Mohney. 'Factors controlling the resistance of Ohmic contacts to n-InGaAs.' Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 30.3 (2012): 031209. [9] Yu, Hao, et al. 'A simplified method for (circular) transmission line model simulation and ultralow contact resistivity extraction.' IEEE Electron Device Letters 35.9 (2014): 957-959. [10] Yu, Hao, et al. 'Multiring circular transmission line model for ultralow contact resistivity extraction.' IEEE Electron Device Letters 36.6 (2015): 600-602. [11] Huang, S-H., et al. ' The ∼3×1020 cm−3 Electron Concentration and Low Specific Contact Resistivity of Phosphorus-Doped Ge on Si by In-Situ Chemical Vapor Deposition Doping and Laser Annealing.' IEEE Electron Device Letters 36.11 (2015): 1114-1117. [12] Luan, Hsin-Chiao, et al. 'High-quality Ge epilayers on Si with low threading-dislocation densities.' Applied physics letters 75.19 (1999): 2909-2911. [13] Vincent, Benjamin, et al. 'Undoped and in-situ B doped GeSn epitaxial growth on Ge by atmospheric pressure-chemical vapor deposition.' Applied Physics Letters 99.15 (2011): 152103. [14] van der PAUYV, L. 'A method of measuring specific resistivity and Hall effect of discs of arbitrary shape.' Philips Res. Rep 13 (1958): 1-9. [15] Li, H., et al. 'Electrical characteristics of Ni Ohmic contact on n-type GeSn.' Applied Physics Letters 104.24 (2014): 241904. [16] Zhang, Xu, et al. 'Formation and characterization of Ni/Al Ohmic contact on n+-type GeSn.' Solid-State Electronics 114 (2015): 178-181. [17] Zheng, Jun, et al. 'Ni (Ge1−x−ySixSny) Ohmic Contact Formation on p-type Ge0.86Si0.07Sn0.07.' IEEE Electron Device Letters 36.9 (2015): 878-880. [18] M.J.H. van Dal et al, in Proceedings of the IEDM Technical Digest International Electron Devices, 2014, (IEEE, San Francisco, CA), p. 235 Chapter.4 [1] Mingshan Liu et al., in 2014 Symposium on VLSI Technology Digest of Technical Papers (IEEE, Honolulu, HI), p. 80. [2] Genquan Han et al., in Proceedings of the IEDM Technical Digest International Electron Devices, 2011 (IEEE, Washington, DC, 2011), p. 402. [3] Y. C. Yeo, V. Subramanian, J. Kedzierski, P. Xuan, T.-J. King, J. Bokor, and C. Hu, “ Nanoscale Ultra-Thin-Body Silicon-on-Insulator P-MOSFET with a SiGe/Si Heterostructure Channel,” IEEE Electron Device Lett., vol. 21, no. 4, pp. 161-163, Apr. 2000. [4] N. Singh, A. Agarwal, L. K. Bera, T. Y. Liow, R. Yang, S. C. Rustagi, C. H. Tung, R. Kumar, G. Q. Lo, N. Balasubramanian, and D.-L. Kwong, High-Performance Fully Depleted Silicon Nanowire (Diameter ≤ 5 nm) Gate-All-Around CMOS Devices,” IEEE Electron Device Lett., vol. 27, no. 5, pp. 383-386, May. 2006. [5] S.-H. Hsu, C.-L. Chu, W.-H. Tu, Y.-C. Fu, P.-J. Sung, H.-C. Chang, Y.-T. Chen, L.-Y. Cho, G.-L. Luo, W. Hsu, C. W. Liu, C. Hu, and F.-L. Yang, “Nearly Defect-free Ge Gate-All-Around FETs on Si Substrates,” in Electron Devices Meeting, 2011. IEDM Technical Digest. IEEE International, 2011, pp. 825-828. [6] S.-H. Hsu, H.-C. Chang, C.-L. Chu, Y.-T. Chen, W.-H. Tu, F. J. Hou, C. H. Lo, P.-J. Sung, B.-Y. Chen, G.-W. Huang, G.-L. Luo, C. W. Liu, C. Hu, and F.-L. Yang, “Triangular-channel Ge NFETs on Si with (111) Sidewall-Enhanced Ion and Nearly Defect-free Channels,” in Electron Devices Meeting, 2012. IEDM Technical Digest. IEEE International, 2012, pp. 525-528. [7] Dan Dan Zhao, Choong Hyun Lee, Tomonori Nishimura, Kosuke Nagashio, Guo An Cheng, and Akira Toriumi, “Experimental and analytical characterization of dual-gated germanium junctionless p-Channel metaloxide-semiconductor field-effect transistors,” Jpn. J. Appl. Phys., vol. 51, no. 4, pp. 04DA03-1–04DA03-7, Apr. 2012. [8] Che-Wei Chen, Cheng-Ting Chung, Ju-Yuan Tzeng, Pang-Sheng Chang, Guang-Li Luo, and Chao-Hsin Chien, “Body-Tied Germanium Tri-Gate Junctionless PMOSFET With In-Situ Boron Doped Channel,” IEEE Electron Device Lett., vol. 35, no. 1, pp. 12-14, Jan. 2014. [9] Noori, Atif M., et al. 'Manufacturable Processes for <32-nm-node CMOS Enhancement by Synchronous Optimization of Strain-Engineered Channel and External Parasitic Resistances.' IEEE Transactions on Electron Devices 55.5 (2008): 1259-1264. [10] Huang, Yu-Shiang, et al. 'High-Mobility CVD-Grown Ge/Strained Ge0.9Sn0.1/Ge Quantum-Well pMOSFETs on Si by Optimizing Ge Cap Thickness.' IEEE Transactions on Electron Devices 64.6 (2017): 2498-2504. [11] G. Eneman, M. Wiot, A. Brugère, O. S. I. Casain, S. Sonde, D. P. Brunco, B. D. Jaeger, A. Satta, G. Hellings, K. D. Meyer, C. Claeys, M. Meuris, M. M. Heyns, 106 and E. Simoen, “Impact of donor concentration, electric field, and temperature effects on the leakage current in germanium p+/n junctions,” IEEE Trans. Electron Devices, Vol. 55, no. 9, pp. 2287-2296, Sep. 2008. [12] S. Gundapaneni, M. Bajaj, R. K. Pandey, K. V. R. M. Murali, S. Ganguly, and A. Kottantharayil, “Effect of Band-to-Band Tunneling on Junctionless Transistors,” IEEE Trans. Electron Devices, Vol. 59, no. 4, pp. 1023-1029, Apr. 2012. [13] Wong, I-Hsieh, et al. 'Junctionless gate-all-around pFETs using in-situ boron-doped Ge channel on Si.' IEEE Transactions on Nanotechnology 14.5 (2015): 878-882. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/20707 | - |
| dc.description.abstract | 本篇論文著重在新穎锗錫材料的磊晶技術、材料分析、磊晶品質檢測與光電元件和電晶體之設計、製備、量測以及特性分析。
鍺材料如今已漸漸應用於光電領域之中,相較於矽材料,鍺擁有較小的能隙,然而其間接能矽的特性卻限制了發光效率。利用鍺錫材料的特性能夠使其擁有直接能矽的特性,應用於光電元件之中能更進一步提升其效能。本論文中,製備了鍺錫材料的金氧半穿隧二極體,在電致發光量測中隨著不同錫含量而有不同的訊號,同時也能作為磊晶材料品質的檢測方法。 而隨著摩爾定律,半導體工業中藉著微縮電晶體尺寸來持續提高電晶體效能,然而,若要使傳統的矽金氧半場效電晶體技術突破物理極限,必須使用高遷移率的材料來取代矽以增加驅動電流,此外,電晶體也勢必需要從平面結構轉為三維結構來提高閘極控制能力和改善短通道效應。本論文中,利用化學氣相沉積進行硼/磷摻雜並成長高品質之鍺錫磊晶層,同時研究擁有高準確度的接觸電阻量測模和樣品製備。最終我們利用高摻雜濃度約3.5x1020 cm-3和1.2x1020 cm-3 之p型和n型鍺錫磊晶樣品進行接觸電阻率量測,其接觸電阻分別可達2.6x10-8 Ω-cm2 and 1.1x10-6 Ω-cm2。 最後,我們將高磊晶品質與高遷移率鍺錫通道與環繞式閘極無接面場效電晶體整合於絕緣層覆矽基板上,利用非等向性的蝕刻技術,有效地去除擁有高缺陷密度的鍺材料緩衝層,同時形成足夠細之鍺錫通道,此外,再加上環繞式閘極擁有較佳的閘極控制能力,因此可達到高電流開關比1.2x105以及次低臨界擺幅103,其導通電流可達510 μA/μm。 | zh_TW |
| dc.description.abstract | In this thesis, We focus on epitaxy technique, material analysis, and epitaxy quality on the promising materials GeSn. Besides, the optoelectronic MIS tunneling diodes and Junctionless GAA pFETs are fabricated.
Ge semiconductors have been widely used in optoelectronics integration due to its bandgap is twice less than Si. However, the luminous efficiency is still limited to its indirect bandgap. The indirect-to-direct transition of Ge can be achieved by Sn incorporation with epitaxy technique and thus further improve the luminous efficiency. In this work, GeSn MIS tunneling diodes are fabricated. The EL emission peak of high-quality epi-GeSn can be tuned by Sn content in the MIS tunneling diodes without the Ge cap. The performance of MOSFETs can be enhanced by shrinking the critical dimension in semiconductor industry followed by the Moore’s law. However, to continually scale the device beyond the fundamental scaling limits, high mobility channel material which can increase the on state current and 3D structure with better gate control ability to reduce the short channel effect are necessary. The high quality in-situ B/P-doped epi-GeSn are grown by CVD. Hall concentration of 3.5x1020 cm-3 and 1.2x1020 cm-3 in B-doped and P-doped GeSn layer are both achieved. Contact resistivity of 2.6x10-8 Ω-cm2 and 1.1x10-6 Ω-cm2 for B-doped and P-doped GeSn can be obtained by RTLM model which has high accuracy. Finally, junctionless gate-all-around pFETs are fabricated with high mobility GeSn channels. Ion/Ioff =1.2x105, Small SS=103 mV/dec, and Ion = 510 μA/μm at Vds = -1 V can be obtained because it has good gate control and the defect region under Ge buffer layer is removed by RIE during the channel formation process. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T02:59:40Z (GMT). No. of bitstreams: 1 ntu-106-R04941058-1.pdf: 3818936 bytes, checksum: 60f76c57672dcfc8ce1b356302ebfc55 (MD5) Previous issue date: 2017 | en |
| dc.description.tableofcontents | 誌 謝 i
摘 要 iii ABSTRACT iv CONTENTS vii LIST OF FIGURES ix Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Thesis Organization 4 1.3 Reference 5 Chapter 2 GeSn MIS Tunneling Diode 6 2.1 Introduction 6 2.2 GeSn MIS Tunneling Diode Fabrication 8 2.3 Electrical and Optical Properties and Discussion 16 2.4 Conclusion 22 2.5 Reference 22 Chapter 3 Heavily in-situ Doped epi-GeSn/Ge Layer with High Carrier Concentration and Low Contact Resistivity 25 3.1 Introduction 25 3.2 Heavily in-situ Doped epi-GeSn 26 3.3 Van der Pauw method 30 3.4 Refined Transmission Line Model 34 3.5 Contact Resistivity for epi-GeSn 36 3.6 Conclusion 40 3.7 Reference 40 Chapter 4 Device Fabrication and Electrical Properties of GeSn Junctionless Gate-all-around pFETs 43 4.1 Introduction 43 4.2 Device Fabrication 44 4.3 Electrical Propertied and Discussion 49 4.4 Conclusion 56 4.5 Reference 56 Chapter 5 Summary and Future Work 58 5.1 Summary 59 5.2 Future Work 60 | |
| dc.language.iso | en | |
| dc.subject | 電致發光 | zh_TW |
| dc.subject | 磊晶 | zh_TW |
| dc.subject | 金氧半發光二極體 | zh_TW |
| dc.subject | 化學氣相沉積 | zh_TW |
| dc.subject | 接觸電阻率 | zh_TW |
| dc.subject | 環繞式閘極場效電晶體 | zh_TW |
| dc.subject | 無接面 | zh_TW |
| dc.subject | 鍺錫 | zh_TW |
| dc.subject | GeSn | en |
| dc.subject | Contact resistivity | en |
| dc.subject | Chemical vapor deposition | en |
| dc.subject | Epitaxy | en |
| dc.subject | Gate-all-around FETs | en |
| dc.subject | Electroluminescence | en |
| dc.subject | Junctionless | en |
| dc.subject | MIS tunneling diode | en |
| dc.title | 鍺錫金氧半發光元件與無接面環繞式閘極電晶體 | zh_TW |
| dc.title | GeSn Metal-insulator-semiconductor Light-emitting Devices and GeSn Junctionless Gate-all-around pFETs | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 105-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 王錦焜,張守進,張廖貴術 | |
| dc.subject.keyword | 鍺錫,金氧半發光二極體,電致發光,磊晶,化學氣相沉積,接觸電阻率,環繞式閘極場效電晶體,無接面, | zh_TW |
| dc.subject.keyword | GeSn,MIS tunneling diode,Electroluminescence,Epitaxy,Chemical vapor deposition,Contact resistivity,Gate-all-around FETs,Junctionless, | en |
| dc.relation.page | 60 | |
| dc.identifier.doi | 10.6342/NTU201702114 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2017-07-27 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
| 顯示於系所單位: | 光電工程學研究所 | |
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