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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳怡然(Yi-Jan Chen) | |
dc.contributor.author | Jian-Tzu Yeh | en |
dc.contributor.author | 葉建祖 | zh_TW |
dc.date.accessioned | 2021-06-08T02:40:39Z | - |
dc.date.copyright | 2020-11-13 | |
dc.date.issued | 2020 | |
dc.date.submitted | 2020-10-14 | |
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Conesa, “Modeling of Linear–Assisted DC–DC converters,” in 18th European Conf. on Circuit Theory and Design, PP. 611–614, 2007. [17] Huey Chian Foong, Meng Tong Tan, and Yuanjin Zheng, “A Supply and Process-Insensitive 12-Bit DPWM for Digital DC-DC Converters,” IEEE MWSCAS, 2009, pp. 929−932. [18] M. Park, M. H. Perrott, and R. B. Staszewski, “A time-domain resolution improvement of an RF-DAC,” IEEE Trans. Circuits Syst. II, Exp.Briefs, vol. 57, no. 7, pp. 517–521, Jul. 2010. [19] D. Navarro, L.A. Barragan, J.I. Artigas, I. Urriza, O. Lucia, and O. Jimenez, “FPGA-based high resolution synchronous digital pulse width modulator,” IEEE International Symposium on Industrial Electronics, 2010, pp. 2771−2776. [20] F.M. Gardner, “Charge-Pump Phase-lock Loops,” IEEE Transactions on Communications, vol. 28, no. 11, pp. 1849–1858, Nov. 1980. [21] Majd G. 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[31] ADG901 – Wideband, 40 dB Isolation at 1 GHz, CMOS 1.65 V to 2.75 V, SPST Switches, ANALOG DEVICES Inc. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/20132 | - |
dc.description.abstract | 科技日新月異,未來人類生活將往智慧顯示的方向發展,利用無線傳輸顯示資料為智慧顯示的重點,隨著科技對資料頻寬的要求逐漸倍增,採用傳統直接轉換發射機(Direct Conversion Transmitter)使很多類比元件已無法滿足高頻寬傳輸時所需的線性度,例如: 數位類比轉換器的高精度要求、混頻器及功率放大器必須足夠線性等,因此許多研究開始朝向數位化的方式來設計射頻發射機,近年被提出的脈衝調變極座標發射機(Pulse-Modulated Polar Transmitter, PMPT)為傳送資料之發射端,有別於傳統直接轉換發射機,將傳送資料的基頻複數訊號轉為振福及相位,且振幅大小利用脈衝寬度調變技術(Pulse Width Modulation)使輸出波形的振幅僅有0或1的兩種可能,如此一來便可使用更不線性的功率放大器來提升傳輸效率,本論文設計之雙相位中心式數位脈波寬度調變器將用來控制射頻脈衝調變器,可應用於現今已成熟的長期演進技術(LTE),或正在發展中是未來趨勢的新無線電(NR),高頻率、高解析度和高精度的脈波輸出,將有效提升應用於射頻脈衝調變器的表現。 本論文使用TSMC 0.18-μm CMOS製程實現,晶片面積為0.96 × 0.75 mm2,規格為輸出相位差異180度的七位元100MHz中心式數位脈波寬度,更準確地描述晶片功能為數位─脈波寬度轉換器,輸入七位元的數位訊號,輸出對應的脈波寬度(工作週期),量測之DNL介於 ± 0.3 LSB,INL介於 - 0.5 LSB ~ + 0.6 LSB,總功耗為14.4 mW,可量測之輸出脈寬範圍為2.5% ~ 96.3%。 | zh_TW |
dc.description.abstract | With the rapid development of science and technology, the life in human society will move in the direction of smart display. Higher bandwidth is required for wireless transmission nowadays. The use of traditional direct conversion transmitter with analog components, such as: ultra-high precision of digital-to-analog converter, and sufficient linear properties of the mixer and power amplifier, will no longer satisfy the required linearity of high-bandwidth transmission. Therefore, many studies have begun to design digital RF transmitter. The Pulse-Modulated Polar Transmitter (PMPT) proposed in recent years, is a TX for wireless transmission, in which unlike conventional direct conversion transmitters, the data of baseband complex signal is converted to magnitude and phase. The pulse width modulation approach is utilized to allow the amplitude of the output waveform alternating between two states, 0 or 1. Thus, it becomes possible to use non-linear power amplifier to boost the transmission efficiency. The DPWM designed in this thesis would be used to control the RF Pulse Modulator, which could be used in the 4GLTE or 5GNR PMPTs. The chip is fabricated in a 0.18-μm CMOS process, and its size is 0.96 × 0.75 mm2. The chip generates the output of dual phase 7-bit 100MHz center-aligned digital pulse width, i.e. digital to pulse width converter. The input is digital code, and the output is pulse width. The digital code is mapped to the corresponding pulse width. Measured DNL is between -0.3 LSB and +0.3 LSB, and INL is between -0.5 LSB and +0.6LSB. The total power consumption is 14.4 mW. The measureable output duty cycle is between 2.5% and 96.3%. | en |
dc.description.provenance | Made available in DSpace on 2021-06-08T02:40:39Z (GMT). No. of bitstreams: 1 U0001-1410202010514800.pdf: 9358784 bytes, checksum: b9f1b28283417747abf1ec5efc42dc79 (MD5) Previous issue date: 2020 | en |
dc.description.tableofcontents | 中文摘要……………………………………………………………………………….III ABSTRACT IV 目錄…………………………………………………………………………………...V 圖目錄………………………………………………………………………VII 表目錄………………………………………………………………………XII Chapter 1 緒論 1 1.1 研究背景與動機 1 1.2 論文架構 3 Chapter 2 數位脈波寬度調變器相關技術與文獻回顧 4 2.1 數位脈波寬度調變原理 4 2.2 各文獻回顧與比較表 17 Chapter 3 雙相位輸出七位元100MHz數位脈波寬度調變器 19 3.1 性能與規格 19 3.2 調變器系統架構 22 3.3 延遲鎖定迴路(Delay-Locked Loop, DLL) 23 3.3.1 啟動控制電路 24 3.3.2 迴路之時域及頻域分析 26 3.3.3 電壓控制延遲線 29 3.3.4 迴路濾波器 31 3.3.5 相位偵測器和充電泵 33 3.4 相位組合電路架構和輸出級 37 3.4.1 相位邊緣偵測和追蹤 38 3.4.2 相位邊緣組合電路 45 3.4.3 查找表 47 3.4.4 中心對齊 49 3.4.5 產生180度相位差輸出 52 3.4.6 推拉式驅動器加入上拉電阻 53 3.5 整體電路模擬結果 55 3.6 晶片佈局與量測 59 3.7 調變訊號5G NR之應用 71 Chapter 4 雙相位數位控制射頻脈衝調變器 75 4.1 電路架構 75 4.2 數位控制脈波寬度調變 76 4.3 射頻放大器及開關混頻器 76 4.4 輸入/輸出阻抗匹配網路 78 4.5 整體電路模擬結果 79 4.6 晶片佈局與量測 82 4.7 討論 99 Chapter 5 結論 101 附錄A……………………………………………………………………………...105 附錄B……………………………………………………………………………...107 | |
dc.language.iso | zh-TW | |
dc.title | 雙相位七位元數位控制脈波寬度調變器 | zh_TW |
dc.title | Dual Phase 7-bit Digital-Controlled Pulse Width Modulator | en |
dc.type | Thesis | |
dc.date.schoolyear | 109-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 陳昭宏(Jau-Horng Chen),郭建宏(Chien-Hung Kuo) | |
dc.subject.keyword | 數位脈波寬度調變器,射頻脈衝調變器,開關鍵控調變,振幅偏移調變,脈衝調變極座標發射機, | zh_TW |
dc.subject.keyword | Digital Pulse Width Modulator,RF Pulse Modulator,On-Off Keying Modulation,Pulse-Modulated Polar Transmitter, | en |
dc.relation.page | 108 | |
dc.identifier.doi | 10.6342/NTU202004263 | |
dc.rights.note | 未授權 | |
dc.date.accepted | 2020-10-15 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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