氫摻雜非晶相銦鎵鋅氧化物薄膜電晶體之電性及穩定度分析

Abstract

高解析度的顯示器已成為未來的趨勢。由於驅動高解析度顯示器的通道材料需要具有更高的載子遷移率（Carrier Mobility），傳統的通道材料非晶矽（-Si）將無法配合未來的需求。雖然低溫多晶矽（LTPS）有著較高的載子遷移率，但其在大尺寸顯示器的應用上有均勻性不足的先天限制。因此近年來非晶相銦鎵鋅氧化物（-IGZO）薄膜電晶體應用於主動矩陣有機發光二極體（AMOLED）已經成為研究的趨勢。相較-Si，-IGZO有著較高的載子遷移率（Mobility∼10 cm2/V-s），且製程上可以在室溫中利用RF-Sputter沈積通道材料，並有效地控制薄膜均勻性。因此，-IGZO成為驅動下世代面板之薄膜電晶體的熱門材料。 -IGZO薄膜的能隙間缺陷態（Subgap states）會隨著不同的成長環境以及退火處理有所差別，使得在電性操作以及光學吸收的特性產生改變。本論文利用廣波長光源量測不同氫退火處理之-IGZO薄膜的光吸收係數，配合Tauc plot的作圖定義出-IGZO薄膜的光能帶隙 (Optical band gap)，並計算出-IGZO薄膜的Urbach energy，以分析不同氫退火條件下之Subgap states的分布。 在-IGZO薄膜電晶體的製程中，緩衝層（Buffer layer）、閘極介電層（Gate dielectric）、層間介電層（Interlayer dielectric）以及鈍化層（Passivation layer）之氧化矽製程中皆使用矽甲烷（SiH4），這將使得氫參雜入-IGZO與其反應。控制不同的SiH4流量，可以控制參雜之氫含量，進而影響元件的電性，例如載子遷移率、次臨界擺幅、次臨界電壓等等。藉由元件的電性量測分析，研究氫參雜對元件電性上的影響，並探討其物理機制。 元件的穩定度在應用與量產上佔有極重要的地位。由於偏壓應力的施加將導致元件失真，使得元件電性衰減。本研究將對元件做正偏壓（PBS）、負偏壓（NBS）以及照光負偏壓（NBIS）的穩定度測試。在先前已發表的文獻中已提出幾項原因以及理論模型，例如：電荷被氧化層捕捉、能帶間產生新的缺陷分布等等，解釋偏壓應力產生的臨界電壓偏移、汲極電流、電子遷移率次臨界斜率的衰退。本論文將對於-IGZO薄膜電晶體進行詳細的穩定度分析，並探討元件電性衰退的物理機制。

Recently, amorphous InGaZnO (-IGZO) has been intensively studied because of its potential display applications including the thin film transistor (TFT) backplanes for flexible display, active matrix organic light-emitting diode display (AMOLED). -IGZO TFTs show low processing temperature, excellent uniformity, good transparency to visible light, and high saturation mobility (>10 cm2/V-s) as compared with conventional amorphous silicon. As a result, -IGZO TFTs are an attractive alternative for advanced displays. The high density of defect states in -IGZO degrades device performance and causes device instability. Therefore, reducing the density of subgap states in -IGZO is critical for applications. The material properties of a-IGZO thin film after forming gas annealing (FGA) is investigated. The absorption spectrum of thin films after FGA are measured through monochromater. The optical band gap and Urbach energy are calculated to analyze the subgap states of -IGZO thin films after FGA. Silane (SiH4) is introduced during the deposition process of gate dielectric, interlayer dielectric, buffer layer, and passivation layer. Hydrogen is incorporated into -IGZO during the deposition processes and affects device performance. The content of hydrogen can be controlled through the SiH4 flow rate. The electrical properties for devices with different SiH4 flow rate are measured to investigate the effect of hydrogen incorporation. The degradation of device performance after electrical bias stress has been reported by the charge trapping mechanism and subgap states creation. Therefore, the reliability tests of -IGZO TFTs with different SiH4 flow rate are measured including positive bias stress (PBS), negative bias stress (NBS), and negative bias illumination stress (NBIS), and discusses the physical mechanism of the degradation.