1200V 4H-SiC 超接面金氧半場效電晶體設計與製作

Abstract

超接面結構應用於矽基功率元件已經行之有年，其結構能夠有效地突破矽功率元件崩潰電壓與特徵導通電阻之權衡，大幅降低常規元件之特徵導通電阻。本論文致力於開發1200 V 4H-SiC超接面金氧半場效電晶體，前期使用Synopsys TCAD Sentaurus進行元件設計，利用電荷平衡的概念開發出兩種超接面結構，其一為分段式超接面結構，其能夠降低20%的特徵導通電阻，其二為半柱式超接面結構，其能夠降低18%的特徵導通電阻且多層磊晶次數也只需分段式超接面結構的一半次數即可達成。因此最後採用半柱式超接面結構予以實作。 SJ MOSFET製作完成後，本次實驗量測到的最佳元件其導通電阻為8.46 mΩ‧cm^2，崩潰電壓為1114 V，臨界電壓3.32 V，最高崩潰電壓可至1176 V。導通電阻過高主要是因為P-well 表面濃度太濃導致通道電阻上升。

A superjunction (SJ) structure has been used in the silicon-based power devices which could effectively break through the trade-off between breakdown voltage (BV) and the specific on resistance (Ron,sp). In this work, we are committed to developing 1200 V 4H-SiC SJ MOSFET. In the beginning, Synopsys TCAD Sentaurus was used for device structure simulation and then two SJ structures were developed based on the charge balance concept. One of them is the Separate pillar SJ (S-SJ) structure. It can reduce the Ron,sp by 20%, comparing with the conventional power MOSFET. The second is the half pillar SJ (HF-SJ) structure, which can reduce the Ron,sp by 18%. In addition, the number of multi-epi growth times of HF-SJ is half of that of S-SJ structure. Therefore, the HF-SJ structure was finally implemented. The best Ron,sp measured in this experiment is about 8.46 mΩ‧cm^2, and the BV is 1114 V and the threshold voltage is 3.32 V. The maximum BV could achieve 1176 V. The Ron,sp is much higher than expected mainly because the concentration of the P-well surface is too high and consequently makes the channel resistance higher.