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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/18027完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃天偉 | |
| dc.contributor.author | Chun Hin Yim | en |
| dc.contributor.author | 嚴俊軒 | zh_TW |
| dc.date.accessioned | 2021-06-08T00:48:55Z | - |
| dc.date.copyright | 2015-07-20 | |
| dc.date.issued | 2015 | |
| dc.date.submitted | 2015-07-15 | |
| dc.identifier.citation | [1] Asad A.Abidi, “RF CMOS Comes of Age,” IEEE JOURNAL OF SOLID-STATE CIRCUIT, vol.39, no. 4, Apr. 2004.
[2] D.B.Leeson,“A simple model of feedback oscillator noise spectrum,” Proc, IEEE, vol. 54, no. 2, pp. 329-330,Feb. 1966. [3] C. Kwok and C. Luong, “Ultra-low-voltage high-performance CMOS VCOs using transformer feedback,” IEEE JOURNAL OF SOLID-STATE CIRCUI., vol. 40, no. 3, pp. 652–660,Mar. 2005. [4] C.-C. Li, T.-P. Hwang, C.-C. Kuo, M.-C. Chuang, and H. Wang, “A 21 GHz complementary transformer coupled CMOS VCO,” IEEE Microw.Wireless Compon.Lett., vol. 18, no.4,pp. 278-280,Apr.2008. [5] Jeng-Han Tsai and Jian-Ping Chou, “A K-Band Low-Power CMOS Transformer-Feedback VCO,” IEEE Radio and Wireless Symposium , pp. 295–297,Feb. 2013. [6] S.Ko,J.-G.Kim, T. Song, E. Yoon, and S.Hong, “20GHz integrated CMOS frequency sources with a quadrature VCO using transformers,” IEEE RFIC Symp Dig, Jun. 2004, pp.267-272 [7] M.Hossain and A. C. Carusone, “20 GHz low power QVCO and de-skew techniques in 0.13um digital CMOS,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2008, pp. 447–450. [8] Szu-Ling Liu, Xin-Cheng Tian, 'A Bias-Varied Low-Power K-band VCO in 90nm CMOS Technology,' IEEE Microw.Wireless Compon.Lett.,vol. 49, no. 2, pp. 402-406, Feb. 2012 [9] M.Schneider, 'Automotive radar-Status and trends,' Proc.German Microwave Conf. Apr. 2005, pp. 144-147 [10] T.Mitomo et al, “A 77GHz 90nm CMOS transeciever FMCW radar applications,” in Symp. VLSI Circuits Dig. Tech. Papers,Jun.2009,pp.246-247 [11] RF Microelectronic,2nd, Razavi,2012 [12] J.Yuan and C.Svensson,'High-speed CMOS circuit technique,' IEEE JOURNAL OF SOLID-STATE CIRCUITS,vol 24,pp. 62-70,Feb. 1998 [13] Cicero S. Vaucher et al, “A Family of Low-Power Truly Modular Programmable Dividers in Standard 0.35um CMOS Technology,” IEEE J. Solid-State Circuits, vol. 35, no. 7, JULY. 2000. [14] 鎖相迴路, 劉深淵, 楊清淵 [15] J.G.Maneatis, “Low-jitter process-independent DLL and PLL based on self-biased techniques,” IEEE J. Solid-State Circuits, vol. 31, pp. 1723–1732, Nov. 1996. [16] J.Lee et al., “A fully-integrated 77-GHz FMCW radar transceiver in 65-nm CMOS technology,” IEEE J. Solid-State Circuits, vol.45, no.12, pp. 2746-2756,Dec. 2010,. [17] T-H. Lin Y-J.Lai, “An agile VCO frequency calibration technique for a 10GHz CMOS PLL,” IEEE J. Solid-State Circuits, vol 42,pp. 340-349, Feb.2007 [18] J.-Y.Lee et al., 'A 9.1 to-11.5GHz four-band PLL for X-band satellite & optical communication applications,' in Proc.IEEE RFIC Symp, pp.233-236, June 2007 [19] R.C.H. van de Beek et al, “A 2.5-10GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-um CMOS,” IEEE J. Solid-State Circuit, vol. 39,, pp. 1862–1872, Nov 2004. [20] N. Pavlovic et al, B. 'A 10GHz Frequency Synthesizer for 802.11a in 0.18um CMOS,' in Proc. of ESSCIRC, pp. 367-370,Sep.2004 [21] L.Perraud, C.Pinatel et al, “A dual-band 802.11a/b/g ratio in 0.18um CMOS,” ISSCC Dig. Tech.Papers, pp.94-95,Feb.2004 [22] Jeng-Han Tsai, 'A X-band Fully Integrated CMOS Frequency Synthesizer,', Proceedings of APMC 2012,Kaohsiung,Taiwan,Dec.4-7,2012 [23] D.Salle et al., “A fully integrated 77 GHz FMCW radar transmitter using a fractional-N frequency synthesizer,” in Proc.Eur.Radar Conf.(EuRAD).Sept.2009 [24] H.Sakurai et al, “A 1.5GHz-modulation-range 10 ms-modulation-period 180KHz –frequency-error 26 MHz-reference mixed-mode FMCW synthesizer for mm-wae radar application,” in IEEE Int.Solid-state Circuits Conf, , pp. 292-293,Feb. 2011,. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/18027 | - |
| dc.description.abstract | 笫2章—個K-Band以180奈米CMOS制程變壓器回饋振盪器，利用變壓器回饋可以令振幅提高,即使在低電位操作下。相比傳統架構，低功耗及低相位雜訊是可以同時得到。這電路功耗是6.7mW,相位雜訊是-103dBc/Hz@1MHz, 這電路是適合適用低功耗應用.
笫3章,ー個X-Band以180奈米CMOS制程FMCW産生器,利用小數型頻率合成器去輸出以線性調變三角波信號,利用特別地設計,功耗只是32mw相位雜訊是-86.5dBc/Hz@1MHz | zh_TW |
| dc.description.abstract | In Chapter 2, a low power K-Band transformer-feedback VCO is designed in 180nm CMOS process. Utilizing transformer-feedback, large signal swings can be achieved. It also achieves low-phase and low power consumption at the same time. The power consumption is 6.7mW at 900mV supply voltage. The phase noise is -103dBc at 1 MHz offset.The result shows that the VCO is suitable for low power applications requiring high signal purity.
In Chapter 3, a low power X-Band FMCW Radar synthesizer in 180-nm CMOS Technology. Utilizing a fractional-N synthesizer as the FMCW generator, the VCO is modulated across a range of 90MHz. The chip consumes 30mw with low power consumption divider chain. The measured output phase noise of the synthesizer is -86.5 dBc/Hz at 1 MHz offset. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T00:48:55Z (GMT). No. of bitstreams: 1 ntu-104-R02942020-1.pdf: 3482247 bytes, checksum: 66c2b4c8050871bc53a573b92c98d987 (MD5) Previous issue date: 2015 | en |
| dc.description.tableofcontents | 論文大綱
Abstract CONTENTS i LIST OF FIGURES iii LIST OF TABLES vii Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 2 Chapter 2 A 900-mV 6.7mW K-Band Low-Phase noise Transformer VCO 3 2.1 Introductions 3 2.2 Phase noise 4 2.2.1 Noise Shaping in Oscillators 4 2.2.2 Leeson’s Empirical Phase Noise Noise Expression 7 2.3 Architecture and Circuit Design 8 2.3.1 Supply Sensitivity 8 2.3.2 Reducing Power Supply noise by MOS Cap 9 2.3.3 Traditional LC tank VCO Topology 9 2.3.4 Transformer VCO 12 2.3.5 Analysis of the transformer-feedback VCO 13 2.4 Simulation 14 2.5 Experimental Result 18 2.6 Summary 23 Chapter 3 A Low Power X-Band FMCW Radar Synthesizer in 180-nm CMOS Technology 24 3.1 Introduction 24 3.1.1 FMCW RADAR 25 3.1.2 Range and velocity resolution 26 3.2 Proposed FMCW generator 26 3.3 Building Blocks of the FMCW generator 27 3.3.1 VCO 27 3.3.2 Design of the CML 31 3.3.3 TSPC DFF 34 3.3.4 Multi-modulus Frequency Divider and Σ-Δ modulator 35 3.3.5 Modulation Control Logic 40 3.3.6 PFD and Charge Pump 41 3.3.7 Loop Filter in Integer- N PLL design 43 3.4 Design of the Loop Bandwidth for FMCW PLL 51 3.5 Parameters of the Loop filter 53 3.6 Simulation result 54 3.7 Experimental Results 59 3.8 Summary and Discussion 63 Chapter 4 Conclusions 66 REFERENCE 67 | |
| dc.language.iso | en | |
| dc.title | 低功耗K-Band變壓器回授震盪器及應用於X-Band雷達頻率調制連續波産生器之研究 | zh_TW |
| dc.title | Design of a low power K-Band transformer VCO and a low power X-Band FMCW Radar Generator | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 103-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 蔡政翰,盧信嘉 | |
| dc.subject.keyword | 頻率合成器,FMCW,雷達,變壓器, | zh_TW |
| dc.subject.keyword | FMCW,PLL,X-Band,VCO,Transformer,Radar, | en |
| dc.relation.page | 69 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2015-07-15 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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