應用在802.11b/g/n之射頻調變器

Abstract

智慧型手機及手持裝置的普及使消費者大量使用手機上網及通訊功能，而大量傳輸訊息的需求則推進了數位通訊的演進，從可遠距離傳輸的2G、3G到4G LTE及較短距離或室內常用的WIFI都大幅提高了資料傳輸量(Data rate)以滿足我們的需求。然而在較高的資料傳輸量情況下對於射頻發射端電路設計日益受到挑戰，如何能維持良好的訊號品質並減少發射端消耗功率變成一個重要的課題。 本論文主旨在提出一新架構的射頻調變器，以達到維持相同訊號品質情況下且降低功率消耗為目標。本架構利用25% Duty Cycle Lo波形在相差90度之間彼此不會互相影響並改良傳統射頻調變器的架構以達到一高增益射頻調變器，可降低後級驅動器功率消耗。 我們採用了TSMC 90-nm CMOS製程設計並實現了一個全積體化的射頻調變器電路，包含除頻器(Divider)、四分之一周期訊號產生器(25% Duty cycle generator)、輸入驅動器(Input Buffer)、射頻調變器(Modulator)、驅動器(Driver)、單端轉雙端轉換器(Single to Differential end Balun)、雙端轉單端轉換器(Differential to Single end Balun)，並將系統設計符合IEEE WLAN 802.11 b/g/n規範及頻帶上。 在輸入CW tone時IRR= -52dBc，Carrier feedthrough= -58dBc，而在電源供應器1.2及1.8伏下，功率消耗為83mW。本晶片在輸入802.11g調變訊號時平均輸出功率為-5 dBm、EVM=3.8%且通過Mask規範。輸入802.11n調變訊號時平均輸出功率為-7.4 dBm、EVM=2.6%且通過Mask規範。

More and more customers use smart phone and handset devices to surf the internet which push digital communication from generation to generation. In order to meet our needs , communication standard such as 3G/4G and WIFI use more complex modulation scheme that can provide higher data rate.. However ,higher data rate means higher Peak-to-average power ratio (PAPR) which impose more difficulties on RF IC design, so how can we maintain good signal quality and reduce transmitter power consumption becomes an important issue. This thesis proposes a new RF modulator architecture which achieve the requirement above. This new architecture uses the unique property of 25 percent duty cycle Lo to improve the disadvantage from traditional one and become a passive high gain RF modulator. I implement a highly-integrated RF modulator chip by TSMC CMOS 90um process, including frequency divider, 25 percent duty cycle generator, input buffer, modulator, driver and two on chip balun. This chip is designed to apply to WLAN 802.11 b/g/n. Single tone performance IRR= -52dBc,Carrier feedthrough=-58dBc.Output power=-5 dBm, EVM=3.8% with 802.11g 64QAM signal and output power=-7.4 dBm with 802.11n 20MHz signal, EVM=2.6%. Total power consumption=83mW.