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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/16265
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dc.contributor.advisor李嗣涔(Si-Chen Lee)
dc.contributor.authorChang-Hung Lien
dc.contributor.author李昶弘zh_TW
dc.date.accessioned2021-06-07T18:07:20Z-
dc.date.copyright2012-12-10
dc.date.issued2012
dc.date.submitted2012-07-23
dc.identifier.citation1. E. M. C. Fortunato, P. M. C. Barquinha, A. C. M. B. G. Pimental, A. M. F.
Goncalves, A. J. S. Marques, L. M. N. Pereira, and R. F. P. Martins, Adv. Mater.,
17, 590 (2005).
2. H. Hosono, Thin Solid Films, 515, 6000 (2007).
3. I.-D. Kim, Y. Choi, and H. L. Tuller, Appl. Phys. Lett., 87, 043509 (2005).
4. S. J. Pearton, D. P. Norton, K. Ip, Y. W. Heo, and T. Steiner, Superlattices Microstruct., 34, 3 (2003).
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17. Jin-Seong Park, Jae Kyeong Jeong,a_ Hyun-Joong Chung, Yeon-Gon Mo, and Hye Dong Kim, APPLIED PHYSICS LETTERS 92, 072104 (2008)
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/16265-
dc.description.abstract氧化鋅透明氧化物半導體近來有逐漸取代傳統非晶矽來當作薄膜電晶體通道層的趨勢,但經由原子沉積技術所沉積出的氧化鋅薄膜,具有高電子濃度的缺點(1019 cm-3~1020 cm-3),易使的薄膜電晶體無法關閉,且易有漏電流的產生,所以須摻雜受體來壓制這些高電子濃度。對於氧化鋅而言,氮、磷、砷,皆是屬於受體,本論文選用氮來當作受體摻雜在氧化鋅中,並選用氨氣來當作氮的來源,並找出最佳的氧化鋅薄膜成長條件:當氨氣摻雜百分之五十時,可將電子濃度降低到1017 cm-3,並擁有霍爾移動率: 15 cm2/V-sec。
利用摻雜百分之五十氮的氧化鋅所製作的薄膜電晶體,利用鈦來當作源極與集極的金屬,且將通道層的厚度降低至30 nm時,可以有效改善所製成薄膜電晶體之電性。而且其最好之開/關電流可以達到6個數量級,最好之場效電子遷移率可以達到20.7 cm2/V-sec,並擁有turn-on電壓: 3 V。此薄膜電晶體元件在利用電子束沉積技術( E-gun)沉積二氧化矽來當作保護層,具有相當不錯的保護效果,沉積完後的薄膜電晶體特性能可維持: 開/關電流達6個數量級,場效電子遷移率可達到18.6 cm2/V-sec。當元件暴露在大氣中,其電子特性經過一個月變化很少。
zh_TW
dc.description.abstractZinc oxide (ZnO) thin film is a promising transparent oxide to replace amorphous silicon used in thin film transistor (TFT), but the ZnO thin film deposited by atomic layer deposition (ALD) has high electron concentration (1019~1020 cm-3). Thin film transistor could not be turned off and exhibited large leakage current. It is necessary to add acceptor into ZnO thin film to suppress electron concentration. For ZnO, nitrogen, phosphorus, and arsenic are acceptors. When choosing ammonia as the precursor of nitrogen, the best performance is achieved when delta doping concentration of NH3 is 50%. It can reduce electron concentration to 1017 cm-3 and has hall mobility around 15 cm2/V-sec.
TFT using the doping condition from above and using Ti as source and drain contact achieves the best on/off current ratio of 6 order of magnitude and the mobility could attain 20.7 cm2/V-sec with Vth=3 V. The ZnO:N TFT that use E-gun silicon oxide (SiOx) as passivation layer has good performance. The on/off current ratio can still remain 6 order of magnitude and the mobility could attain 18.6 cm2/V-sec after deposition SiOx as passivation layer. The electrical properties change very little when the passivated TFT was exposed to atmosphere for 30 days.
en
dc.description.provenanceMade available in DSpace on 2021-06-07T18:07:20Z (GMT). No. of bitstreams: 1
ntu-101-R98943061-1.pdf: 4276506 bytes, checksum: e527456a3780f0711669c2371fe78257 (MD5)
Previous issue date: 2012
en
dc.description.tableofcontents中文口試委員會審定書 i
英文口試委員會審定書 ii
誌謝 iii
摘要 iv
ABSTRACT v
CONTENTS vi
LIST OF FIGURES ix
LIST OF TABLES xiii
Chapter 1 Introduction 1
Chapter 2 Experiments 4
2.1 Deposition System 4
2.1.1 PECVD 4
2.1.2 PEALD 9
2.2 Substrate Preparation 13
2.3 Deposition Procedures 13
2.3.1 PECVD 13
2.3.2 PEALD 15
2.4 Measurement Techniques 15
2.4.1 Film Thickness and Refractive Index 15
2.4.2 X-ray Photoelectron Spectroscopy (XPS) 16
2.4.3 X-Ray Diffraction(XRD) 16
2.4.4 Hall Measurement System 16
2.4.5 Atomic Force Microscopy(AFM) 17
2.4.6 Scanning Electron Microscopy (SEM) 17
2.4.7 IR Absorption Spectra 18
2.4.8 Current – Voltage Characteristics 18
Chapter 3 The Low Temperature Nitrogen Doped Zinc Oxide and Hydrogenated Amorphous Silicon Nitride Thin Film 21
3.1 Experiments 21
3.2 Results and discussion 22
3.2.1 Nitrogen doped zinc oxide (ZnO:N) fabricated by PEALD 22
3.2.2 Hydrogenated amorphous silicon nitride thin film fabricated by PECVD 37
Chapter 4 Nitrogen Doped Zinc Oxide Thin Film Transistor 40
4.1 Back Channel Etching type and Inverted-Coplanar type ZnO:N TFT using Al as source and drain contact 40
4.2 Results and discussion 46
4.3 Back Channel Etching (BCE) type ZnO:N TFT using Ti as source and drain contact 52
4.4 Results and discussion 52
4.5 Experiment for Back Channel Etching (BCE) type ZnO:N TFT with E-gun Silicon Oxide passivation 66
4.6 Results and discussion 67
Chapter 5 Conclusions 71
References 73
dc.language.isoen
dc.subject薄膜電晶體zh_TW
dc.subject原子層沉積技術zh_TW
dc.subject氧化鋅zh_TW
dc.subjectAtomic Layer Deposition(ALD)en
dc.subjectThin Film Transistor(TFT)en
dc.subjectZinc Oxide(ZnO)en
dc.title利用電漿增強型原子層沉積技術製作摻氮氧化鋅薄膜電晶體zh_TW
dc.titleNitrogen Doped Zinc Oxide Thin Film Transistor fabricated by Plasma Enhanced Atomic Layer Depositionen
dc.typeThesis
dc.date.schoolyear100-2
dc.description.degree碩士
dc.contributor.oralexamcommittee林浩雄(Hao-Hsiung Lin),陳奕君(I-Chun Cheng),周政旭(Cheng-Hsu Chou)
dc.subject.keyword原子層沉積技術,氧化鋅,薄膜電晶體,zh_TW
dc.subject.keywordAtomic Layer Deposition(ALD),Zinc Oxide(ZnO),Thin Film Transistor(TFT),en
dc.relation.page75
dc.rights.note未授權
dc.date.accepted2012-07-23
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
顯示於系所單位:電子工程學研究所

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