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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 王暉(Huei Wang) | |
dc.contributor.author | Hung-Fu Chi | en |
dc.contributor.author | 齊宏輔 | zh_TW |
dc.date.accessioned | 2021-06-07T17:56:26Z | - |
dc.date.copyright | 2012-08-17 | |
dc.date.issued | 2012 | |
dc.date.submitted | 2012-08-14 | |
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[31] R. Berenguer, G. Liu, and Y. Xu, “A low power 77 GHz noise amplifier with an area efficient RF-ESD protection in 65 nm CMOS,” in IEEE Microw. Wireless Compon. Lett., vol. 20, no. 12, pp. 678–680, Dec. 2010. [32] A. Y.-K. Chen, Y. Baeyens, Y.-K. Chen, and J.-S. Lin, “A low-power linear SiGe BiCMOS low-noise amplifier for millimeter-wave active imaging,” in IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp. 103–105, Feb. 2010. [33] Y. Hamada, M. Tanomura, M. Ito, and K. Maruhashi, “A high gain 77 GHz power amplifier operating at 0.7 V based on 90 nm CMOS technology,” in IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 329–331, May 2009. [34] R. Eye and D. Allen, “77 GHz low noise amplifier for automotive radar applications,” in 25st Annu. IEEE GaAs IC Symp. Dig., Nov. 2003, pp. 139–142. [35] J. Lee, C.-C. Chen, J.-H. Tsai, K.-Y. Lin, and H. Wang, “A 68-83 GHz power amplifier in 90 nm CMOS,” in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 2009, pp. 437–440. [36] H. Kondoh, K. Sekine, S. Takatani, K. Takano, H. Kurota, and R. Dabkowski, “77 GHz fully-MMIC automotive forward-looking radar,” in 21st Annu. IEEE GaAs IC Symp., Oct. 1999, pp. 211–214. [37] David M. Pozar, Microwave Engineering 3/e, John Wiley & Sons, 2005. [38] 廖澤宇撰,微波與毫米波低雜訊放大器及壓控振盪器之研究,國立台灣大學電信工程研究所碩士論文,第三章,頁61–97,一月, 2012年。 | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/15958 | - |
dc.description.abstract | 本論文分為兩個部份。第一部分為倍頻器,第二部分為放大器,皆採用0.15微米低雜訊假晶高速電子遷移率電晶體製程製作。
第一部份為描述24至36-GHz六倍頻器。此電路是由二倍頻器、緩衝放大器以及三倍頻器所組成。在元件選取、級間分析、阻抗匹配以及穩定性分析上亦會詳加說明。此電路於輸入功率為 -7 dBm、輸出頻率為30 GHz時,轉換增益約5.3 dB,且在同樣的輸入功率下,基頻壓制比 -60 dB好,其它倍頻之諧波壓制在輸出頻率24 GHz至31.5 GHz間,皆小於 -10 dB。 第二部分描述77-GHz低雜訊放大器及77-GHz緩衝放大器,兩個電路皆以疊接組態設計,並應用在77-GHz開–關鍵移系統。當電路操作在高頻時,較難掌握電晶體模型內的參數,模擬與量測會產生差異。為了得到更好的一致性,萃取測試電路的小訊號參數及直流參數來建立Angelov模型。除了模型的準確度外,在佈局砷化鎵電晶體疊接組態的電路時,由背板導孔造成的電感效應會影響疊接組態的第二級電路閘極處之旁路電容,甚至使電路振盪。因此利用接地共面波導的電路佈局的方式減低此效應。最後,兩個放大器在77-GHz小訊號增益量測結果分別為22 dB、15 dB,而頻率同為77 GHz下,輸入功率為 -15 dBm時,輸出功率分別為2.7 dB及 -1 dB,消耗的直流功率分別為28.5 mW及29.5 mW。 | zh_TW |
dc.description.abstract | This thesis consists of two parts. The first part is frequency multipliers and the second part is amplifiers. These circuits are implemented using 0.15-um low-noise pseudomorphic high electron mobility transistor (low-noise pHEMT) technology.
The first part introduces a 24-36 GHz sixtupler consisting of a doubler, a buffer and a tripler. The details of device selection, inter-stage analysis, impedance matching and stability analysis will also be discussed. The measured conversion gain is about 5.3 dB at 30-GHz output frequency with input power of -7 dBm. Under the same input power, the measured result of harmonic suppression shows fundamental harmonic suppression is better than -60 dB and the other harmonic suppressions are better than -10 dB between 24 GHz to 31.5 GHz. The second part presents a 77-GHz low-noise amplifier and a 77-GHz buffer amplifier. Both circuits are used cascode configuration and also applied as a 77-GHz on-off keying system (OOK system). Because of the inaccuracy of the transistor model provided by the semiconductor foundry, the simulation result do not agree well with the measurement result at high frequency. To achieve a better agreement, Angelov model is generated by extracting dc parameters and small signal parameters of a test-key device. In the circuit design, device selection and impedance matching are based on the modified model. Beside the accuracy of the transistor model, grounded coplanar waveguide (GCPW) structure are utilized in order to decrease the inductive effect of the cascode configuration in GaAs pHEMT process due to the backside via hole. The measured small signal gain of the low-noise amplifier and the buffer amplifier are 22 dB and 15 dB, respectively. Under input power of -15 dBm, the measured output power result of the low-noise amplifier and the buffer amplifier are 2.7 dB and -1 dBm and the dc consumption are 28.5 mW and 29.5 mW, respectively. | en |
dc.description.provenance | Made available in DSpace on 2021-06-07T17:56:26Z (GMT). No. of bitstreams: 1 ntu-101-R98942010-1.pdf: 2234877 bytes, checksum: 8eb1f284a578bcb87cf0307f6aaa19e2 (MD5) Previous issue date: 2012 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 ii ABSTRACT iii 目錄 v 圖目錄 vii 表目錄 xiii 第1章 概論 1 1.1 背景與動機 1 1.2 文獻檢索 2 1.2.1 倍頻器 2 1.2.2 77-GHz 放大器 4 1.3 論文貢獻 6 1.4 論文架構 7 第2章 24至36 GHz六倍頻器製作於砷化鎵製程 8 2.1 倍頻器簡介 8 2.2 電路設計 10 2.2.1 製程簡介[24] 10 2.2.2 六倍頻器之規格及架構 11 2.2.3 4至6-GHz二倍頻器設計 14 2.2.4 8至12 GHz 緩衝放大器設計 20 2.2.5 24至36 GHz三倍頻器設計 24 2.2.6 穩定度分析 31 2.3 模擬結果 33 2.4 量測結果 36 2.5 總結 39 第3章 77-GHz高頻放大器製作於砷化鎵製程 41 3.1 電晶體模型的修改 41 3.1.1 修改模型之動機 41 3.1.2 Angelov模型的建立 43 3.2 電路設計及模擬結果 60 3.2.1 系統考量 60 3.2.2 77-GHz低雜訊放大器設計 62 3.2.3 77-GHz緩衝放大器設計 69 3.2.4 旁路電容設計 73 3.3 量測結果 75 3.4 總結 82 第4章 結論 84 參考文獻 86 | |
dc.language.iso | zh-TW | |
dc.title | 24至36-GHz六倍頻器與77-GHz疊接放大器之研製 | zh_TW |
dc.title | Research of 24 to 36-GHz Sixtupler and 77-GHz Cascode Amplifiers | en |
dc.type | Thesis | |
dc.date.schoolyear | 100-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 蔡作敏,林坤佑,章朝盛,張鴻埜 | |
dc.subject.keyword | 低雜訊假晶高速電子遷移率電晶體,六倍頻器,低雜訊放大器,緩衝放大器,開–關鍵移系統,接地共面波導, | zh_TW |
dc.subject.keyword | low-noise pseudomorphic high electron mobility transistor (low-noise pHEMT),sixtupler,low-noise amplifier (LNA),buffer amplifier (BA),on-off keying system (OOK system),grounded coplanar waveguide (GCPW), | en |
dc.relation.page | 90 | |
dc.rights.note | 未授權 | |
dc.date.accepted | 2012-08-15 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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