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  1. NTU Theses and Dissertations Repository
  2. 重點科技研究學院
  3. 積體電路設計與自動化學位學程
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101765
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dc.contributor.advisor黃鐘揚zh_TW
dc.contributor.advisorChung-Yang Ric Huangen
dc.contributor.author楊翔淳zh_TW
dc.contributor.authorHsiang-Chun Yangen
dc.date.accessioned2026-03-04T16:23:29Z-
dc.date.available2026-03-05-
dc.date.copyright2026-03-04-
dc.date.issued2026-
dc.date.submitted2026-02-23-
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101765-
dc.description.abstract量子預言機在量子演算法與密碼學中扮演重要角色。傳統的合成流程會先將經典電路轉換為 XOR-AND 圖(XAG),再將該 XAG 編譯成量子預言機。然而,現有的 XAG 合成流程往往忽略較高輸入扇入的邏輯元件,導致生成的 XAG 含有過多的與邏輯閘,進而使量子預言機需要更高資源實現。
我們提出一個新的量子預言機合成流程,在技術映射中引入 NPN 類別以降低 XAG 中 AND 閘的數量。此外,我們針對可逆卵石遊戲中的與邏輯閘鏈運算提出一種降低 T-count 為目標的最佳化演算法。最後,我們針對一個新的最佳化目標–時空體積提出一個啟發式演算法。
實驗結果顯示,與典型合成流程相比,時空體積平均降低 45.6%。此外,透過在映射過程中允許更豐富的邏輯元件(例如 AND3 與 AIA 閘),我們在 T-count上平均可達到 1% 的改善。總體而言,我們所提出的流程能以更低的資源成本完成量子預言機合成。
zh_TW
dc.description.abstractQuantum oracles play an important role in quantum algorithms and cryptography. Traditional synthesis pipelines first transform a classical circuit into an Xor-And graph (XAG) and then compile the XAG into a quantum oracle. However, existing XAG-based synthesis flows often overlook higher-fanin logic components, which can lead to XAGs with excessive AND gates and, consequently, quantum oracles with higher resource requirements. We propose a quantum oracle synthesis flow that incorporates NPN classes into technology mapping to reduce the number of AND gates in the mapped XAG. We also introduce a T-optimized algorithm that reduces the cost of AND-chain recomputation within reversible pebbling game. In addition, we propose a heuristic method for optimizing a resource metric called space--time volume. Experimental results show an average 45.6% reduction in space-time volume compared with the typical oracle synthesis flow. Moreover, by enabling richer logic components, such as AND3 and AIA gates, during mapping, the proposed flow achieves an average 1.5% reduction in T-count. Overall, the proposed flow enables quantum oracle synthesis with lower resource costs.en
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dc.description.provenanceMade available in DSpace on 2026-03-04T16:23:29Z (GMT). No. of bitstreams: 0en
dc.description.tableofcontentsVerification Letter from the Oral Examination Committee i
Acknowledgements ii
摘要 iv
Abstract v
Contents vii
List of Figures xi
List of Tables xiii
Denotation xiv
Chapter 1 Introduction 1
1.1 Applications of Quantum Oracles 1
1.2 Introduction to a Typical Quantum Oracle Synthesis Flow 2
1.3 Resource Optimization for Quantum Oracle Synthesis 3
1.4 Previous Work on Quantum Oracle Synthesis 4
1.5 Contribution of this work 5
1.6 Thesis Structure 6
Chapter 2 Preliminary 7
2.1 Introduction to Quantum Circuit 7
2.1.1 Quantum Bit and Quantum State 8
2.1.2 Quantum Gate 8
2.1.3 Initialization and Measurement 10
2.2 Quantum Oracle 11
2.3 And-Inverter Graph & Xor-And-Inverter Graph 12
2.4 Technology Mapping 14
2.4.1 Cut-Based Technology Mapping 15
2.4.2 Example for Technology Mapping 16
2.5 NPN Classes 17
2.6 Low-T-count Logical Gates Using Ancilla 19
2.6.1 AND Gate Implemented using 4 T-gates 20
2.6.2 6-T CCCX gate and 3-input AND gate 21
2.7 Reversible Pebbling Game 23
2.7.1 Preprocess 23
2.7.2 Scheduling 24
2.7.3 Postprocess 27
2.7.4 Example for Reversible Pebbling Game 28
Chapter 3 And-Reduction-Driven Cell Library for Technology Mapping 31
3.1 Effect of Reducing the Number of AND Gates 31
3.2 Caveats of Mapping Functions to Pure XAG Circuits 32
3.3 Adding 3-, 4-, and 5-Input NPN Classes to the Cell Library 34
3.4 AIG Preprocess & Postprocess 35
Chapter 4 A T-optimized Algorithm for Realizing AND Chains in the Reversible Pebbling Game 37
4.1 Introduction to AND3-like Operations 37
4.2 Example of Choosing an AND3-like Operation over Two AND2 Gate 39
4.3 Cost Function for Trading AND2 with AND3-like Operation 41
4.4 An Algorithm for $T$-optimized Mapping 42
4.5 Example of the T-optimized Algorithm for Realizing AND Chains 44
Chapter 5 A Complete Oracle Synthesis Flow with Improved State-of-the-art Techniques 46
5.1 Ambiguity in Optimization Objectives of the Reversible Pebbling Game 46
5.2 New Objective: Space-Time Volume 48
5.3 A Heuristic Algorithm for Finding a Better Circuit Under the Space-Time Volume Metric 49
Chapter 6 Experimental Results 53
6.1 Experiment Settings 53
6.1.1 Benchmark Selection 54
6.2 Result 1: Reduced #AND2-count for Technology Mapping with NPN Classes as Cell Library 55
6.3 Result 2: The effect of AND-count on Reversible Pebbling Game using Space-Time Volume (w/ AND chain reduction) 55
6.4 Result 3: T-Count Reduction from T-Optimized AND Chains Algorithm 56
Chapter 7 Conclusion and Future Work 60
7.1 Conclusion 60
7.2 Future Work 61
7.2.1 Effect of NPN Classes in Cell Library 61
7.2.2 How XAG Structure Affects Pebbling-Based Synthesis 62
7.2.3 Improving the Space--Time Volume Heuristic 63
References 64
Appendix A - ABC Commands Used for AIG Optimization and Technology Mapping 69
A.1 Overview 69
A.2 Example 69
Appendix B - NPN Classes XAG Generation with Minimum AND2 Implementation 71
B.1 Enumeration of 4-input NPN Classes 71
B.2 Minimum-AND2 Implementations for Selected \ 5-Input NPN Classes 73
Appendix C - And-Inv-And Implementation with 6 T-count 74
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dc.language.isoen-
dc.subject量子運算-
dc.subject量子預言機合成-
dc.subjectNPN類別-
dc.subject技術映射-
dc.subject可逆卵石遊戲-
dc.subject時空體積-
dc.subjectQuantum Computing-
dc.subjectQuantum Oracle Synthesis-
dc.subjectNPN Classes-
dc.subjectTechnology Mapping-
dc.subjectReversible Pebbling Game-
dc.subjectSpace-Time Volume-
dc.title透過與邏輯閘降減導向技術映射與 T 最佳化可逆卵石遊戲技術改進量子預言機合成zh_TW
dc.titleImproving Quantum Oracle Synthesis via AND-Reduction-Driven Technology Mapping and T-Optimized Reversible Pebbling Techniquesen
dc.typeThesis-
dc.date.schoolyear114-1-
dc.description.degree碩士-
dc.contributor.oralexamcommittee洪士灝;邱大維;李建模zh_TW
dc.contributor.oralexamcommitteeShih-Hao Hung;Dah-Wei Chiou;Chien-Mo Lien
dc.subject.keyword量子運算,量子預言機合成NPN類別技術映射可逆卵石遊戲時空體積zh_TW
dc.subject.keywordQuantum Computing,Quantum Oracle SynthesisNPN ClassesTechnology MappingReversible Pebbling GameSpace-Time Volumeen
dc.relation.page75-
dc.identifier.doi10.6342/NTU202600718-
dc.rights.note同意授權(限校園內公開)-
dc.date.accepted2026-02-24-
dc.contributor.author-college重點科技研究學院-
dc.contributor.author-dept積體電路設計與自動化學位學程-
dc.date.embargo-lift2026-03-05-
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