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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳景然 | zh_TW |
| dc.contributor.advisor | Ching-Jan Chen | en |
| dc.contributor.author | 黃紹棋 | zh_TW |
| dc.contributor.author | Shao-Chi Huang | en |
| dc.date.accessioned | 2026-02-26T16:51:52Z | - |
| dc.date.available | 2026-02-27 | - |
| dc.date.copyright | 2026-02-26 | - |
| dc.date.issued | 2026 | - |
| dc.date.submitted | 2026-01-26 | - |
| dc.identifier.citation | [1] JSSC12: T.–C. Huang et al., "A Battery-Free 217 nW Static Control Power Buck Converter for Wireless RF Energy Harvesting with α-Calibrated Dynamic On/Off Time and Adaptive Phase Lead Control," IEEE JSSC, vol. 47, no. 4, pp. 852-862, April 2012.
[2] JSSC18: P. -H. Chen, C. -S. Wu and K. -C. Lin, "A 50 nW-to-10 mW Output Power Tri-Mode Digital Buck Converter With Self-Tracking Zero Current Detection for Photovoltaic Energy Harvesting," in IEEE Journal of Solid-State Circuits, vol. 51, no. 2, pp. 523-532, Feb. 2016, doi: 10.1109/JSSC.2015.2506685. [3] JSSC17: A. Paidimarri and A. P. Chandrakasan, "A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power," in IEEE Journal of Solid-State Circuits, vol. 52, no. 12, pp. 3119-3131, Dec. 2017, doi: 10.1109/JSSC.2017.2747217. [4] JSSC18: F. Santoro et al., "A Hysteretic Buck Converter with 92.1% Maximum Efficiency Designed for Ultra-Low Power and Fast Wake-Up SoC Applications,"IEEE JSSC, vol. 53, no. 6, pp. 1856-1868, June 2018. [5] TPEL19: M. S. Ahmed and A. A. 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Li, "A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled Buck Converter With A2-Comparator and Sleep-Time Detector for IoT Application," in IEEE Transactions on Power Electronics, vol. 36, no. 11, pp. 12898-12909, Nov. 2021, doi: 10.1109/TPEL.2021.3082896. [9] SSCL22: Z. Gao, Y. Hao, H. Wei, Y. Li and M. Chen, "A 96% Peak Efficiency Adaptively Controlled PSM Buck Converter With Low-Quiescent Current and Wide Dynamic Range for IoT Applications," in IEEE Solid-State Circuits Letters, vol. 5, pp. 276-279, 2022, doi: 10.1109/LSSC.2022.3222879. [10] TPEL22: J. -S. Kim, J. -O. Yoon and B. -D. Choi, "A High-Light-Load-Efficiency Low-Ripple-Voltage PFM Buck Converter for IoT Applications," in IEEE Transactions on Power Electronics, vol. 37, no. 5, pp. 5763-5772, May 2022, doi: 10.1109/TPEL.2021.3131594. [11] JSSC22: X. Liu et al., "A Sub-nW 93% Peak Efficiency Buck Converter With Wide Dynamic Range, Fast DVFS, and Asynchronous Load-Transient Control," IEEE JSSC, vol. 57, no. 7, pp. 2054-2067, July 2022 [12] TCAS23: T. -H. Tsai, T. -W. Sun, K. -Y. Liao and C. -C. Chang, "A 180 nA Quiescent Current Digital Control Dual-Mode Buck Converter With a Pulse-Skipping Load Detector for Long-Range Applications," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 7, pp. 3040-3048, July 2023, doi: 10.1109/TCSI.2023.3270180. [13] CICC23: B. Wang, Y. Xie, J. Guo and L. Cheng, "A 150nA IQ, 850mA ILOAD, <10mV Ripple Buck Converter with >90% Efficiency over 10μA to 400mA Loading Range," 2023 IEEE Custom Integrated Circuits Conference (CICC), San Antonio, TX, USA, 2023, pp. 1-2, doi: 10.1109/CICC57935.2023.10121321. [14] ASSCC23: T. Shimogawa et al., "An On-Chip DC-DC Converter and Power Management System Achieving Zero Standby-to-Active Transition Time in MCU," 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), Haikou, China, 2023, pp. 1-3, doi: 10.1109/A-SSCC58667.2023.10347999. [15] TPEL24: A. Besharati Rad, M. Kargaran, M. Meghdadi and A. Medi, "A Wide-Input-/Output-Voltage-Range Buck Converter With Adaptive Light-Load Efficiency Improvement and Seamless Mode Transition," in IEEE Transactions on Power Electronics, vol. 39, no. 2, pp. 2200-2212, Feb. 2024, doi: 10.1109/TPEL.2023.3336872. [16] JSSC19: Kuo T H, Huang Y W, Wang P Y. Background capacitor-currentsensor calibration of DC-DC buck converter with DVS for accurately accelerating load-transient response. 2019 IEEE International Solid-State Circuits Conference, 2019, 430 [17] ISSCC19: Choi M, Kye C H, Oh J, et al. A synthesizable digital AOT 4-phase buck voltage regulator for digital systems with 0.0054mm2 controller and 80 ns recovery time. 2019 IEEE International Solid-State Circuits Conference, 2019, 432 [18] JSSC19: Lee B, Song M K, Maity A, et al. A 25-MHz four-phase SAW hysteretic control DC–DC converter with 1-cycle active phase count. IEEE J Solid State Circuits, 2019, 54, 1755. [19] JSSC21: K. Wei and D. B. Ma, "A 10-MHz DAB Hysteretic Control Switching Power Converter for 5G IoT Power Delivery," IEEE JSSC, vol. 56, no. 7, pp. 2113-2122, July 2021. [20] JSSC22: Y. -W. Huang and T. -H. Kuo, "Fixed-Switching-Frequency Background Capacitor-Current-Sensor Calibration for DC–DC Converters," in IEEE Journal of Solid-State Circuits, vol. 57, no. 5, pp. 1504-1516, May 2022, doi: 10.1109/JSSC.2021.3103418. [21] ISSCC22: Cho J H, Kim D K, Bae H H, et al. A 1.23W/mm 83.7%-efficiency 400MHz 6-phase fully integrated buck converter in 28nm CMOS with on-chip capacitor dynamic re-allocation for inter-inductor current balancing and fast DVS of 75mV/ns. 2022 IEEE International Solid-State Circuits Conference, 2022. [22] ISSCC22: Schaef C, Salus T, Rayess R, et al. A Imax, fully integrated multiphase voltage regulator with 91.5% peak efficiency at 1.8 to 1V, operating at 50MHz and featuring a digitally assisted controller with automatic phase shedding and soft switching in 4nm class FinFET CMOS. 2022 IEEE International Solid-State Circuits Conference. [23] C. -Y. Wu, C. -J. Tsai, C. -J. Chen, C. -C. Tu, S. -T. Wang and Y. -H. Wen, "A 200 nA Quiescent Current N-FinFET Power Stage Buck Converter with Passive Ramp On-Off-Time Control in 12 nm FinFET," 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), HsinChu, Taiwan, 2023 [24] Y .- C. Lin, C .- J. Chen, D. Chen and B. Wang, "A Ripple-Based Constant On-Time Control With Virtual Inductor Current and Offset Cancellation for DC Power Converters," IEEE Trans. Power Electron., vol. 27, no. 10, pp. 4301-4310, Oct.2012. [25] P. Cao, Y. Wang, J. Xu and Z. Hong, "A 55nA Quiescent Current Power-Wise Buck Converter With 1μA–600mA Load Range and 0.5V–1.8V Flexible Output Voltage Options," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 72, no. 1, pp. 397-407, Jan. 2025, doi: 10.1109/TCSI.2024.3413769. [26] B. Wang, Y. Xie, L. Cheng and J. Guo, "A Single Li-Ion Battery Powered Buck Converter With >90% Efficiency Over 10-μA to 500-mA Loading Range by Utilizing Compensator-Based Built-In Mode Tracking Technology," in IEEE Journal of Solid-State Circuits, vol. 60, no. 5, pp. 1743-1755, May 2025, doi: 10.1109/JSSC.2024.3454078 [27] W. -C. Liu, C. -J. Chen, C. -H. Cheng and H. -J. Chen, "A Novel Accurate Adaptive Constant On-Time Buck Converter for a Wide-Range Operation," in IEEE Transactions on Power Electronics, vol. 35, no. 4, pp. 3729-3739, April 2020, doi: 10.1109/TPEL.2019.2936524. [28] I-Chieh Wei, Dan Chen, Yu-Cheng Lin and Ching-Jan Chen, "The stability modeling of ripple-based constant on-time control schemes used in the converters operating in DCM," 2012 International Conference on Renewable Energy Research and Applications (ICRERA), Nagasaki, 2012, pp. 1-8, doi: 10.1109/ICRERA.2012.6477338. [29] V. Ivanov, R. Brederlow and J. Gerber, "An Ultra Low Power Bandgap Operational at Supply From 0.75 V," in IEEE Journal of Solid-State Circuits, vol. 47, no. 7, pp. 1515-1523, July 2012, doi: 10.1109/JSSC.2012.2191192. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101705 | - |
| dc.description.abstract | 隨著物聯網（IoT）與電池供電裝置之快速發展，電源管理積體電路（Power Management Integrated Circuits, PMICs）在超輕載與待機模式下的能量轉換效率愈發重要。為延長系統電池壽命並降低待機功耗，直流轉換器需在維持穩定輸出與快速暫態響應的同時，大幅降低其靜態電流消耗。本論文提出一款具備超低靜態電流之同步降壓型直流轉換器，結合主動斜坡自適應導通時間控制（Active-Ramp Adaptive On-Time, ARAOT）與 NN 型功率級（N-N power stage）架構，以兼顧超輕載至重載操作範圍內之整體效率表現。
所提出之轉換器之控制架構採用雙轉導斜坡產生機制，透過主動斜坡控制與零交越偵測電路，使系統可於連續導通模式與不連續導通模式間達成平順模式轉換（seamless mode transition），有效抑制傳統 COT 架構中因切換模式所造成的輸出電壓擾動。在重載操作下，所設計之 NN 型功率級可降低導通損耗並提升電源傳輸效率；而於輕載與待機狀態時，藉由雙層級偏壓電流設計與睡眠模式控制策略，大部分電路模組可被關閉，僅保留關鍵維持電路運作，以有效降低系統靜態功耗。 本晶片使用 TSMC 0.18 μm BCD 製程實現。量測結果顯示，在輸入電壓為3.6V，輸出電壓為1.8V且輸出電流介於 10 μA 至 1 A 的廣泛操作範圍內，轉換效率皆可維持於 85% 以上；於超輕載條件（2μA）下，仍可達 70% 以上的轉換效率。此外，負載暫態量測結果顯示本轉換器具備良好的電壓調節能力與快速回復特性。整體實驗結果證實，所提出之架構適用於對超低功耗與高效率皆有高度需求之電池供電應用系統。 | zh_TW |
| dc.description.abstract | With the rapid growth of Internet-of-Things (IoT) and battery-powered applications, power management integrated circuits (PMICs) are increasingly required to achieve high energy conversion efficiency over an extremely wide load current range, especially under ultra-light-load and standby conditions. To extend battery lifetime while maintaining stable output regulation and fast transient response, dc–dc converters must significantly reduce quiescent current without sacrificing heavy-load efficiency. This thesis presents a synchronous buck converter featuring ultra-low quiescent current, which integrates an Active-Ramp Adaptive On-Time (ARAOT) control scheme with an NN-type power stage to achieve high efficiency from ultra-light load to heavy load operation.
The proposed converter control architecture employs a dual-transconductance ramp generation scheme combined with active-ramp control and a calibrated zero-crossing detection (ZCD) circuit, enabling seamless mode transition between continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Compared with conventional constant on-time (COT) based architectures, the proposed ARAOT scheme effectively reduces control voltage shifting during mode transitions, thereby improving transient behavior. At heavy-load conditions, the NN-type power stage minimizes conduction loss and enhances power conversion efficiency, while at light-load and standby conditions, a multi-level bias current scheme and sleep-mode operation are adopted to significantly reduce the overall quiescent current by selectively disabling non-critical circuit blocks. The proposed converter is fabricated using a TSMC 0.18-μm BCD process. Measurement results demonstrate that the converter achieves over 85% efficiency across a wide load current range from 10 μA to 1 A(VIN=3.6V, VO=1.8V), and maintains over 70% efficiency at an ultra-light load of 2 μA. In addition, the measured load transient responses exhibit good voltage regulation and fast recovery characteristics. These results validate that the proposed architecture is well suited for battery-powered systems requiring both ultra-low power consumption and high efficiency over a wide operating range. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2026-02-26T16:51:52Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2026-02-26T16:51:52Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 誌謝 i
中文摘要 ii Abstract iv Table of Contents vi List of Figures ix List of Tables xiii Chapter 1 Introduction 1 1.1 Background 1 1.2 Prior works 2 1.3 Chip Design Goal 3 1.4 Thesis Outline 6 Chapter 2 Proposed Control Strategy and Overall Circuit 8 2.1 Circuit Architecture 8 2.2 Time Domain Operation 11 2.3 Transient Acceleration Mechanism and Seamless Transition 18 2.4 Small Signal Analysis 24 2.4.1 Limitation of Conventional Ripple-Based Control 24 2.4.2 Active Ramp Generation and Pole Decoupling Mechanism 25 2.4.3 Frequency-Domain Interpretation of GVC Stability 26 2.4.4 Impact of MLCC Derating and Robustness of the Proposed Scheme 27 Chapter 3 Key Subblocks 30 3.1 Power Stage and Cross Couple Driver 30 3.2 Dual-Level Bias Current Architecture 34 3.2.1 Fast Wake-Up High-Current Bias Generator 35 3.2.2 Ultra-Low-Current Always-On Bias Generator 37 3.3 Gmch Circuit Design for Output-Voltage-Sensed Ramp Generation 40 3.4 Gmdch Circuit Design and Implementation 42 3.5 Sample-and-Hold Bandgap Reference (SAH BGR) 43 3.5.1 System-Level Motivation 43 3.5.2 Architecture Overview 44 3.5.3 Sample-and-Long-Hold Operation 45 3.5.4 Long-Hold Effectiveness Verification 46 3.5.5 Temperature Characteristics under Different Input Voltages 47 Chapter 4 Simulation and Measurement 49 4.1 Chip Implementation and Quiescent Current Analysis 49 4.2 Preview of Key Operating Scenarios 52 4.3 Measurement Results and Discussion 56 4.3.1 Measurement Setup 57 4.3.2 Measured Power-Up Behavior and Output Regulation 58 4.3.3 Measured Steady-State Operation Across Operating Modes 60 4.3.4 Measured Seamless Mode Transition 62 4.3.5 Measured Load Transient Response 63 4.3.6 Measured Efficiency 67 Chapter 5 Conclusion and future work 70 5.1 Conclusion 70 5.2 Future Work 73 Reference 74 | - |
| dc.language.iso | en | - |
| dc.subject | 降壓轉換器 | - |
| dc.subject | 主動式斜率補償 | - |
| dc.subject | 純NMOS電晶體功率級 | - |
| dc.subject | 低靜態電流 | - |
| dc.subject | 平順模式轉換 | - |
| dc.subject | Buck converter | - |
| dc.subject | active ramp compensation | - |
| dc.subject | all-NMOS power stage | - |
| dc.subject | low quiescent current | - |
| dc.subject | seamless mode transition | - |
| dc.title | 具低靜態電流之主動式斜坡自適應性導通時間控制降壓轉換器 | zh_TW |
| dc.title | Low Quiescent Current Active Ramp Adaptive On Time Controlled Buck Converter | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 114-1 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 陳柏宏;陳耀銘;黃顗融;蘇昱丞 | zh_TW |
| dc.contributor.oralexamcommittee | Po-Hung Chen;Yaow-Ming Chen;Yi-Rong Huang;Yu-Chen Su | en |
| dc.subject.keyword | 降壓轉換器,主動式斜率補償純NMOS電晶體功率級低靜態電流平順模式轉換 | zh_TW |
| dc.subject.keyword | Buck converter,active ramp compensationall-NMOS power stagelow quiescent currentseamless mode transition | en |
| dc.relation.page | 78 | - |
| dc.identifier.doi | 10.6342/NTU202600361 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2026-01-27 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電子工程學研究所 | - |
| dc.date.embargo-lift | N/A | - |
| 顯示於系所單位： | 電子工程學研究所 | |
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