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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳中平 | zh_TW |
| dc.contributor.advisor | Charlie Chung-Pin Chen | en |
| dc.contributor.author | 莊惠淇 | zh_TW |
| dc.contributor.author | HUI-CHI CHUANG | en |
| dc.date.accessioned | 2025-11-26T16:37:25Z | - |
| dc.date.available | 2025-11-27 | - |
| dc.date.copyright | 2025-11-26 | - |
| dc.date.issued | 2025 | - |
| dc.date.submitted | 2025-10-03 | - |
| dc.identifier.citation | IEEE EPS, Heterogeneous Integration Roadmap (HIR), ch. 20, “Thermal,” 2023.
IEEE EPS, Heterogeneous Integration Roadmap (HIR), ch. 20, “Thermal,” 2021. TSMC, “3DFabric® overview,” TSMC Technology, 2023. TSMC, “The Whats, Whys, and Hows of TSMC-SoIC®,” TSMC Technology, 2023. TSMC, “Press release: SoW-X (System-on-Wafer eXtreme),” Apr. 2025. TSMC, “CoWoS®—Chip on Wafer on Substrate,” TSMC Technology, 2024. Cerebras Systems, “Cerebras Wafer Scale Engine: Technical overview,” White Paper, 2022. C. Gaitonde, Metrology Development for Thermal Challenges in Advanced Packaging, Purdue Univ., 2024. IBM Research, “Fast 3D thermal simulation for integrated circuits with domain decomposition,” Tech. Rep., 2022. Y.-J. Jang et al., “Advanced 3D through-Si-via and solder bumping technologies,” Micromachines, vol. 14, no. 3, pp. 611–620, 2023. C. Xu et al., “Thermal bottlenecks in wafer-scale AI accelerators,” IEEE Trans. 97 Compon., Packag., Manuf. Technol., vol. 13, no. 5, pp. 1001–1012, 2025. C.-W. Liang et al., “Fan-out panel-level package warpage and reliability,” Microelectron. Reliab., vol. 153, 2024. Q. Xu et al., “Comparison of Cerebras wafer-scale integration and conventional GPU clusters,” arXiv preprint arXiv:2504.03808, 2025. W. Li et al., “Finite element analysis of 2.5D packaging processes,” Microelectron. J., vol. 135, 2024. Q. Xu et al., “Wafer-scale accelerators could redefine AI,” arXiv preprint arXiv:2504.21140, 2025. K. Skadron et al., “Temperature-aware microarchitecture: Modeling and management,” in Proc. 30th Annu. Int. Symp. Comput. Archit. (ISCA), 2003, pp. 2–13. K. Skadron et al., “Temperature-aware microarchitecture: Modeling and management,” ACM Trans. Archit. Code Optim., vol. 1, no. 1, pp. 94–125, 2004. C. J. M. Lasance, “Ten years of boundary-condition-independent compact thermal modeling,” Heat Transf. Eng., vol. 29, no. 2, pp. 149–168, 2008. L. Codecasa et al., “Versatile MOR-based compact thermal models,” Microelectron. Reliab., vol. 88–90, pp. 1200–1205, 2018. O. C. Zienkiewicz, R. L. Taylor, and J. Z. Zhu, The Finite Element Method: Its Basis and Fundamentals, 7th ed. Oxford, U.K.: Elsevier, 2013. A. Toselli and O. Widlund, Domain Decomposition Methods—Algorithms and Theory. Berlin, Germany: Springer, 2005. C. Farhat, M. Lesoinne, and K. Pierson, “FETI-DP: A dual-primal method,” Int. J. Numer. Meth. Eng., vol. 50, no. 7, pp. 1523–1544, 2001. C. R. Dohrmann, “BDDC: A preconditioner for substructuring,” SIAM J. Sci. Comput., vol. 25, no. 1, pp. 246–258, 2003. M. J. Gander, “Optimized Schwarz methods,” SIAM Rev., vol. 46, no. 3, pp. 489–545, 2006. A. Toselli and O. Widlund, Domain Decomposition Methods—Algorithms and Theory. Berlin, Germany: Springer, 2005. M. J. Gander, “Schwarz methods over the course of time,” Electron. Trans. Numer. Anal., vol. 31, pp. 228–255, 2008. C. Farhat, M. Lesoinne, and K. Pierson, “A scalable dual-primal domain decomposition method,” Int. J. Numer. Meth. Eng., vol. 50, no. 7, pp. 1523–1544, 2001. C. R. Dohrmann, “A preconditioner for substructuring based on constrained energy minimization,” SIAM J. Sci. Comput., vol. 25, no. 1, pp. 246–258, 2003. M. J. Gander and A. St-Cyr, “Optimized Schwarz methods for coupled PDEs,” SIAM J. Sci. Comput., vol. 29, no. 1, pp. 222–249, 2007. Y.-C. Chen (陳穎君), Domain Decomposition Method for Steady-State Thermal Analysis with Multiscale Technique, Master’s thesis, National Taiwan University, 2025. C. G. Deotte, Domain Partitioning Methods for Elliptic Partial Differential Equations, Ph.D. dissertation, Univ. California, San Diego, CA, USA, 2014. W. Yu, T. Zhang, X. Yuan and H. Qian, "Fast 3-D Thermal Simulation for Integrated Circuits With Domain Decomposition Method," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 12, pp. 2014-2018, Dec. 2013, doi: 10.1109/TCAD.2013.2273987. Bank, R.E., Deotte, C. The influence of partitioning on Domain Decomposition convergence rates . Comput. Visual Sci. 18, 53–63 (2017). https://doi.org/10.1007/s00791-016-0271-5 G. Karypis and V. Kumar, “A fast and high-quality multilevel scheme for partitioning irregular graphs,” SIAM J. Sci. Comput., vol. 20, no. 1, pp. 359–392, 1998. Ü. V. Çatalyürek and C. Aykanat, “Hypergraph-partitioning-based decomposition for parallel sparse matrix–vector multiply,” IEEE Trans. Parallel Distrib. Syst., vol. 10, no. 7, pp. 673–693, 1999. G. Karypis and V. Kumar, “Multilevel hypergraph partitioning: Applications in VLSI design,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 7, no. 1, pp. 69–79, 1999. F. Pellegrini, “SCOTCH and PT-SCOTCH user guides,” INRIA Rep., 2007. K. D. Devine et al., “Zoltan: Data-management services for parallel dynamic applications,” Comput. Sci. Eng., vol. 4, no. 2, pp. 90–97, 2002. G. Monte Carlo Methods R. E. Caflisch, “Monte Carlo and quasi-Monte Carlo methods,” Acta Numer., vol. 7, pp. 1–49, 1998. N. Metropolis and S. Ulam, “The Monte Carlo method,” J. Amer. Stat. Assoc., vol. 4, no. 247, pp. 335–341, 1949. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101052 | - |
| dc.description.abstract | 本論文提出一套基於最佳化的矩形分割框架,應用於先進半導體封裝之熱模擬中的區域分解法。在既有 DDM 用於積體電路熱模擬的研究成果及探討分割對收斂性影響的基礎上,本研究結合了對熱通量敏感的 HeatTerm 與源自幾何界限的 MemoryTerm,以雙目標最佳化模型形式建構分割策略。所提出的方法設計上相容於多尺度 Neumann–Neumann 求解器,能在提升收斂效率與記憶體可擴展性之間取得平衡,並透過蒙地卡羅擾動增強數值穩健性。
在均勻與非均勻分布、低功耗 SoC 以及系統級晶圓案例中驗證結果顯示,本方法可在確保溫度精度維持於0.3°C 以內的同時,達成最高 40% 的運算時間縮減與最高 68% 的記憶體節省。更重要的是,優化後的分割策略在傳統等分法失敗的情境下,仍能成功維持收斂。綜合而言,本研究所提出之最佳化導向分割,為從晶片級 SoC 到系統級晶圓的熱分析,建立了一條兼具可擴展性與可靠性的途徑。 | zh_TW |
| dc.description.abstract | This thesis presents an optimization-based rectangular partitioning framework for domain decomposition methods (DDM) in thermal simulations of advanced semiconductor packaging. Building on prior DDM applications to IC thermal analysis and convergence studies highlighting partitioning effects, the framework integrates a flux-sensitive HeatTerm with a geometry-driven MemoryTerm derived from geometric bounds. Designed for compatibility with multiscale Neumann–Neumann solvers, the approach balances convergence efficiency and memory scalability, with Monte Carlo perturbations improving robustness.
Validation on uniform and non-uniform domains, a low-power SoC, and a waferscale System-on-Wafer (SoW) confirmed temperature accuracy within 0.3 °C, runtime reductions up to 40%, and memory savings up to 68%. Importantly, optimized partitions consistently achieved convergence where equal partitions failed. These findings establish optimization-guided partitioning as a scalable and reliable pathway for thermal analysis across chip-level to wafer-scale integration platforms. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-11-26T16:37:25Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-11-26T16:37:25Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 致謝 I
中文摘要 II ABSTRACT III LIST OF CONTENTS IV LIST OF FIGURES Ⅸ LIST OF TABLES Ⅻ CHAPTER 1 INTRODUCTION 1 1.1 Background and Motivation 1 1.1.1 Thermal Challenges in Wafer-Scale Systems 1 1.1.2 Domain Decomposition for Scalable Thermal Analysis 2 1.2 Literature Review 3 1.2.1 Advanced Integration and Packaging 3 1.2.2 Thermal Issues in Advanced Packaging 5 1.2.3 Thermal Modeling and Simulation 6 1.2.4 Domain Decomposition Methods for Thermal Simulation 7 1.2.5 Domain Partitioning in Scalable Simulation 8 1.3 Thesis Organization 10 CHAPTER 2 FEM AND DDM FRAMEWORK FOR THERMAL ANALYSIS 11 2.1 Chapter Introduction 11 2.2 Finite Element Method (FEM) in Thermal Simulation 12 2.2.1 Governing Equation 12 2.2.2 Weak Formulation 13 2.2.3 Discretization and Matrix System 13 2.2.4 Limitations of FEM 14 2.3 Domain Decomposition Methods (DDM 14 2.3.1 Classification of DDM 15 2.3.2 Neumann–Neumann Algorithm 18 2.3.3 Multiscale Enhancements 19 2.3.4 Challenges and Advances 20 2.3.5 Practical Implications for Thermal Simulation 21 2.4 Partitioning in DDM 22 2.4.1 Modern Graph and Hypergraph Partitioning Methods 23 2.4.2 Motivation for Optimization-Based Rectangular Partitioning 25 2.5 Summary 27 CHAPTER 3 OPTIMIZATION MODEL FOR RECTANGULAR PARTITIONING 28 3.1 Chapter Introduction 28 3.2 Problem Formulation 29 3.3 HeatTerm with Monte Carlo Error Modeling 30 3.3.1 Deterministic HeatTerm 30 3.3.2 Motivation for Stochastic Modeling 31 3.3.3 Significance and Theoretical Basis 32 3.4 MemoryTerm to Control Memory Footprint 32 3.4.1 Geometric Lower Bound of Interface Length 33 3.4.2 MemoryTerm Representation 34 3.4.3 Interpretation and Role in Optimization 35 3.5 Balancing Subdomain Size 35 3.6 Weighting Coefficient Selection 36 3.7 Analytical Validation: Sine–Sine Case 37 3.7.1 Problem Setup 37 3.7.2 HeatTerm and MemoryTerm Modeling 38 3.7.3 Numerical Observations 39 3.8 Partition Strategy vs. Computational Resources 40 3.9 Summary 43 CHAPTER 4 IMPLEMENTATION OF PARTITION OPTIMIZATION AND DDM SOLVER 44 4.1 Chapter Introduction 44 4.2 Input Handling and Preprocessing 45 4.2.1 Model Inputs 45 4.2.2 Multiscale Grid Abstraction 47 4.3 Partition Optimization Module 49 4.4 Multiscale Thermal Solver Module 51 4.5 Overall Software Structure 54 CHAPTER 5 VALIDATION AND PERFORMANCE EVALUATION 56 5.1 Chapter Introduction 56 5.2 Simulation Methodology 57 5.2.1 Model Configuration and Partition Results 57 5.2.2 Partition Optimization and Results 67 5.2.3 Computational Environment 75 5.3 Performance Evaluation 76 5.3.1 Steady-State Thermal Analysis and Accuracy 76 5.3.2 Computational Efficiency 84 5.4 Convergence Behavior under Partition Strategies 90 5.4.1 HeatTerm-Dominated Partitions Cause Divergence 90 5.4.2 Convergence Issues at Material-Boundary Interfaces 91 5.5 Insights from Partition Selection 93 CHAPTER 6 CONCLUSION 94 REFERENCES 96 A. Roadmaps and Industrial Reports 96 B. Advanced Packaging and Wafer-Scale Integration 96 C. Thermal Modeling and Compact Models 97 D. FEM and Numerical Foundations 98 E. Domain Decomposition Methods (DDM) and Preconditioners 98 F. Graph/Hypergraph Partitioning and Parallelization 99 G. Monte Carlo Methods 100 | - |
| dc.language.iso | en | - |
| dc.subject | 區域分解法(DDM) | - |
| dc.subject | 熱模擬 | - |
| dc.subject | 先進封裝 | - |
| dc.subject | 晶圓級系統(SoW) | - |
| dc.subject | 有限元素法(FEM) | - |
| dc.subject | 最佳化分割 | - |
| dc.subject | Domain Decomposition Method (DDM) | - |
| dc.subject | Thermal Simulation | - |
| dc.subject | Advanced Packaging | - |
| dc.subject | System-on-Wafer (SoW) | - |
| dc.subject | Finite Element Method (FEM) | - |
| dc.subject | Partition Optimization | - |
| dc.title | 應用於多尺度穩態熱分析的域分解分割優化 | zh_TW |
| dc.title | Partition Optimization for Domain Decomposition in Multiscale Steady-State Thermal Analysis | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 114-1 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.coadvisor | 鄭士康 | zh_TW |
| dc.contributor.coadvisor | Shyh-Kang Jeng | en |
| dc.contributor.oralexamcommittee | 陳柏羽;魏世昕 | zh_TW |
| dc.contributor.oralexamcommittee | Po-Yu Chen;Shih-Hsin Wei | en |
| dc.subject.keyword | 區域分解法(DDM),熱模擬先進封裝晶圓級系統(SoW)有限元素法(FEM)最佳化分割 | zh_TW |
| dc.subject.keyword | Domain Decomposition Method (DDM),Thermal SimulationAdvanced PackagingSystem-on-Wafer (SoW)Finite Element Method (FEM)Partition Optimization | en |
| dc.relation.page | 100 | - |
| dc.identifier.doi | 10.6342/NTU202504538 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2025-10-03 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 生醫電子與資訊學研究所 | - |
| dc.date.embargo-lift | N/A | - |
| 顯示於系所單位: | 生醫電子與資訊學研究所 | |
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