應用於第六代通訊系統之D頻段放大器、二倍頻器與單刀單擲切換器之研究

Abstract

本論文包含三個部分。第一部分是應用於6G通訊系統發射端的D頻段寬頻驅動放大器設計與量測結果，使用65奈米金氧半場效電晶體製程。第二部分是應用於6G通訊系統本地震盪源之D頻段倍頻器設計與量測結果，使用65奈米金氧半場效電晶體製程。第三部分為應用於涵蓋6G多頻段之超寬頻單刀單擲開關設計與量測結果，使用90奈米金氧半場效電晶體製程。 首先是預計應用於300 GHz相位陣列收發系統之驅動放大器，為了增強混頻器產生的訊號，所提出的放大器不僅需要寬頻寬，還必須提供足夠的增益和輸出功率性能。因此，針對65奈米金氧半場效電晶體製程在D頻段的增益性能較差的問題，採用增益提昇技術來提高增益。此外，本設計也採用了補償匹配技術來獲得更寬的頻寬。量測結果表明，所提出的驅動放大器在大於10 dB小訊號增益下表現出128至170 GHz的頻寬。輸出1dB壓縮點功率在140、150和160 GHz時分別為-7.4、-3.7 和-7.3 dBm。此外，整體晶片包總面積為0.38平方毫米，其中核心電路面積僅為0.1平方毫米。 第二部分提出應用在140 GHz收發系統之本地震盪源組件之低功號D頻段二倍頻器。採用補償馬遜平衡不平衡轉換器來最小化幅度和相位差，以獲得更好的轉換增益和基頻抑制性能。為了增強轉換和輸出功率性能，採用了共源共柵拓樸架構。並採用增益提昇技術進一步提升轉換增益效能。量測結果表明，此二倍頻器的工作頻率範圍為143 GHz至170 GHz，在158 GHz達到-3.5 dB的峰值轉換增益。輸入功率為4.3 dBm時，在158 GHz處輸出峰值功率為0.76 dBm。在整個頻帶內，基頻抑制大於41.3 dBc。此外，此二倍頻器的直流功耗為16.3 mW，含pad面積為0.262 平方毫米。 最後一部分介紹了專為跨多頻段發射機系統設計的超寬頻超緊湊單刀單擲 (SPST) 開關。所提出的開關僅由四個電晶體和幾個電阻器組成，沒有任何大型被動元件，如電感器、變壓器或傳輸線，以最小化晶片尺寸。量測結果顯示，所提出的單刀單擲開關在DC至140 GHz與170 GHz頻寬內，分別實現小於3.3 dB與3.6 dB的插入損耗，具有覆蓋多個超寬頻收發系統的潛力。回波損耗140 GHz與170 GHz內分別優於 14 dB 與 9 dB；隔離度在相同頻段則分別優於 22 dB 與 18.5 dB，展現良好的關斷狀態性能。此開關的核心面積為 980 μm2，比先前報告的毫米波寬頻單刀單擲開關面積小兩個數量級或更多。

This thesis consists of three main parts. The first chapter presents the design and measurement results of a D-band broadband driving amplifier for a 6th-generation wireless system (6G) transmitter fabricated in a 65-nm CMOS process. The second chapter describes the design and measurement results of a D-band doubler for a local oscillation chain in a 140 GHz transceiver system fabricated in a 65-nm CMOS process. The last chapter discusses the design and measurement of an ultra-wideband and compact switch for multi-band coverage in a 6G transceiver system fabricated in a 90-nm CMOS process. The first part focuses on a driving amplifier designed for the potential network in a 300 GHz phased-array transceiver system. To boost the signal generated by the mixer, the proposed amplifier not only demands a wide bandwidth but also has to provide sufficient gain and output power performance. Therefore, the gain-boosting technique was adopted to boost gain due to the poor gain performance of CMOS in the D-band. Additionally, the compensated matching technique is also utilized in this design to obtain a broader bandwidth. The measurement results show that the proposed driving amplifier exhibits a bandwidth of 128 to 170 GHz over a 10 dB small signal gain. The output 1-dB compression point power levels are -7.4, -3.7, and -7.3 dBm at 140, 150, and 160 GHz, respectively. Furthermore, the total area with pads is 0.38 mm2 (0.42 mm0.9mm), and the core area of the proposed amplifier is 0.1 mm2 (0.15 mm0.665mm). The second part presents a D-band doubler designed for 140 GHz transceivers. The compensated Marchand balun is adopted to minimize the amplitude and phase difference to obtain better conversion gain and rejection performance. In order to enhance the conversion and output power performance, a cascode topology is adopted. The gain-boosting technique is utilized to further increase the conversion gain performance. The measurement results show that the proposed frequency doubler covers from 143 GHz to 170 GHz, and the peak conversion gain is -3.5 dB occurs at 158 GHz. The peak output power exhibits 0.76 dBm at 158 GHz with 4.3 dBm input power. The fundamental rejection is greater than 41.3 dBc in the entire frequency bandwidth. Furthermore, the proposed frequency doubler consumes 16.3 mW DC power, and occupies 0.262 mm2 (0.4 mm  0.655 mm) with all pads. The last part introduces an ultra-wideband and ultra-compact single-pole-single-through (SPST) switch designed for a multi-band transceiver system. The proposed switch is composed of only four transistors and several resistors, and without any large passive components such as an inductor, transformer, or transmission lines to minimize the chip size. The proposed switch achieves less than 3.3 dB and 3.6 dB insertion loss from DC to 140 GHz and 170 GHz, which has the potential to cover multiple ultra-wideband transceiver systems. The return loss is greater than 14 dB and 9 dB within 140 GHz and 170 GHz, respectively. The off-state performance of isolation is better than 22 dB and 18.5 dB within 140 GHz and 170 GHz, respectively. The proposed switch achieves an IP1dB of 10.6 dBm at 75 GHz and an IP1dB of 10 dBm at 110 GHz. The core area of the switch is 980 μm2, which is two or more orders of magnitude smaller than the previously reported mm-Wave broadband SPST switch.