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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/99028完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃建璋 | zh_TW |
| dc.contributor.advisor | Jian-Jang Huang | en |
| dc.contributor.author | 張智翔 | zh_TW |
| dc.contributor.author | Zhi-Xiang Zhang | en |
| dc.date.accessioned | 2025-08-21T16:06:43Z | - |
| dc.date.available | 2025-08-22 | - |
| dc.date.copyright | 2025-08-21 | - |
| dc.date.issued | 2025 | - |
| dc.date.submitted | 2025-08-02 | - |
| dc.identifier.citation | 1. Flack, T.J., B.N. Pushpakaran, and S.B. Bayne, GaN technology for power electronic applications: a review. Journal of Electronic Materials, Jun. 2016. 45: p. 2673-2682.
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Gupta, C., et al., OG-FET: An In-Situ Oxide, GaN Interlayer-Based Vertical Trench MOSFET. IEEE Electron Device Letters, 2016. 37(12): p. 1601-1604. 36. Gupta, C., et al., In situ oxide, GaN interlayer-based vertical trench MOSFET (OG-FET) on bulk GaN substrates. IEEE Electron Device Letters, 2017. 38(3): p. 353-355. 37. Gupta, C., et al., First demonstration of AlSiO as gate dielectric in GaN FETs; applied to a high performance OG-FET. IEEE Electron Device Letters, 2017. 38(11): p. 1575-1578. 38. Liu, C., R.A. Khadar, and E. Matioli, Vertical GaN-on-Si MOSFETs with monolithically integrated freewheeling Schottky barrier diodes. IEEE Electron Device Letters, Jul. 2018. 39(7): p. 1034-1037. 39. Ji, D., et al., Improved dynamic Ron of GaN vertical trench MOSFETs (OG-FETs) using TMAH wet etch. IEEE Electron Device Letters, 2018. 39(7): p. 1030-1033. 40. Liu, J., et al. 1.2 kV vertical GaN fin JFETs with robust avalanche and fast switching capabilities. in Proc. IEEE Int. Electron Devices Meeting (IEDM). Dec. 2020. San Francisco, CA, USA. 41. Khadar, R.A., et al., Quasi-vertical GaN-on-Si reverse blocking power MOSFETs. Applied Physics Express, 2021. 14(4): p. 046503. 42. Tang, W., et al., Effects of the stepped sidewall morphology on the ON-state performance for vertical GaN trench-gate MOSFETs. Applied Physics Express, 2022. 15(7): p. 076502. 43. Zhu, R., et al., GaN quasi-vertical trench MOSFETs grown on Si substrate with ON-current exceeding 1 A. Applied Physics Express, 2022. 15(12): p. 121004. 44. Wen, X., et al., High Current Density Trench CAVET on Bulk GaN Substrates with Low-Temperature GaN Suppressing Mg Diffusion. Crystals, 2023. 13(4): p. 709. 45. Zhou, J., et al., Comparative analysis of the GaN nonpolar plane morphology by wet treatment and its effect on electrical properties in trench MOSFET. ACS Applied Materials & Interfaces, 2023. 15(21): p. 26159-26165. 46. Kamiński, M., et al., Vertical GaN Trench‐MOSFETs Fabricated on Ammonothermally Grown Bulk GaN Substrates. physica status solidi (a), 2024. 221(21): p. 2400077. 47. Zhang, Y., et al., Dynamic Reliability Assessment of Vertical GaN Trench MOSFETs With Thick Bottom Dielectric. IEEE Transactions on Device and Materials Reliability, 2024. 24(3): p. 358-364. 48. Peng, K., S. Eskandari, and E. Santi. Characterization and modeling of SiC MOSFET body diode. in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC). Mar. 2016. Long Beach, CA, USA. 49. Hou, X., D. Boroyevich, and R. Burgos. Characterization on latest-generation SiC MOSFET's body diode. in Proc. IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA). Nov. 2016. Albuquerque, NM, USA. 50. Lin, D.-J., et al., Normally-off AlGaN/GaN HEMTs with a low reverse conduction turn-on voltage. IEEE Access, Sep. 2023. 11: p. 98452-98457. 51. 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Sabui, G., et al., Modeling and simulation of bulk gallium nitride power semiconductor devices. AIP Advances, May 2016. 6(5): p. 055006. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/99028 | - |
| dc.description.abstract | 本論文著重於具體溝槽結構之半垂直式氮化鎵溝槽閘極金氧半場效電晶體進行製程開發與電性分析。藉由採用體溝槽結構，可強化閘極對通道區的控制能力，並有效降低元件於反向導通狀態下之導通電壓與阻抗，以提升元件性能與穩定性。
本研究製作具體溝槽與無體溝槽之元件，並進行電流–電壓與電容–電壓特性量測。實驗結果指出，體溝槽可有效降低臨界電壓、改善次臨界擺幅，並減緩閘極電壓正反掃描後所產生之遲滯現象；電容–電壓特性分析亦說明界面陷阱密度有所降低。進一步比較不同體溝槽尺寸對元件電性之影響，實驗結果顯示，雖導通電流略有下降，但在臨界電壓、次臨界擺幅與遲滯效應方面，隨尺寸增加而顯著改善。透過元件模擬分析亦證實，體溝槽有助於閘極所誘發電場的橫向擴散，電場分佈得以延展至更深層區域，緩解集中於閘極氧化層邊緣的電場強度，提升場控均勻性，進而降低界面陷阱與遲滯現象。 此外，本研究亦探討第三象限操作下之反向導通量測，結果顯示體溝槽結構有助於改善反向導通機制，使導通電流提升三個數量級，展現優異反向導通表現。綜合實驗與模擬結果，體溝槽結構於提升元件性能與穩定操作方面展現高度潛力，具後續應用與設計參考價值。 | zh_TW |
| dc.description.abstract | This work investigates the fabrication and electrical performance of quasi-vertical GaN trench-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with a body trench structure. By adopting the body trench design, gate control over the channel region is enhanced, and both the conduction voltage and resistance during reverse conduction are reduced, thereby improving device performance and stability.
Devices with and without the body trench were fabricated, and their electrical characteristics were evaluated through current–voltage (I–V) and capacitance–voltage (C–V) measurements. The experimental findings demonstrate that introducing a body trench leads to a lower threshold voltage (VTH), improved subthreshold swing (SS), and reduced hysteresis (ΔVTH) between forward and reverse gate sweeps. Capacitance–voltage analysis also shows a significant reduction in interface trap density (Dit). The impact of varying body trench dimensions on device characteristics was also analyzed. Results show that although increased trench size slightly decreases the on-state current, it provides better performance in threshold voltage, subthreshold swing, and hysteresis suppression. Simulation analysis further confirms that the body trench facilitates lateral spreading of the gate-induced electric field, allowing the field to extend into deeper into the p-GaN layer. This redistribution mitigates electric field crowding at the gate oxide edge, leading to enhanced field uniformity, suppressed interface traps, and reduced hysteresis effects. Moreover, third-quadrant reverse conduction measurements also demonstrate that the body trench significantly improves the reverse conduction mechanism, increasing the conduction current by approximately three orders of magnitude and exhibiting excellent reverse conduction characteristics. Based on experimental and simulation results, the body trench structure shows strong potential for improving device performance and operational stability, offering valuable reference for future applications and design. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-08-21T16:06:43Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-08-21T16:06:43Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 口試委員審定書 II
致謝 III 中文摘要 IV ABSTRACT V CONTENTS VII LIST OF FIGURES IX LIST OF TABLES XV Chapter 1 Introduction 1 1.1 Background of Vertical GaN MOSFETs 1 1.1.1 Overview of Lateral and Vertical GaN Devices 1 1.1.2 Mechanisms of Reverse Conduction in Vertical GaN MOSFETs 7 1.1.3 Prior Research on GaN Devices with Body Trench Structures 14 1.2 Research Motivation 16 1.3 Thesis Outline 18 Chapter 2 Fabrication of Vertical MOSFETs with Body Trench Structures 20 2.1 Epitaxial Layer Structure 20 2.2 Design of Body Trench Structure and Device Layout 21 2.3 Fabrication Process of the Device 25 Chapter 3 Electrical Characterization of Vertical GaN MOSFETs 31 3.1 Introduction 31 3.2 Measurement Setup 32 3.2.1 Direct Current I–V Measurement 32 3.2.2 Capacitance–Voltage Measurement 33 3.3 Transfer and Output Characteristics 34 3.4 Reverse Conduction Characteristics and Equivalent Circuit Analysis 40 3.5 Capacitance–Voltage Measurements and Interface Trap Analysis 45 3.6 Influence of Body Trench Dimension Scaling 50 3.6.1 Structural Design Considerations for Body Trench 50 3.6.2 Fabrication Adjustments and Post-Metallization Annealing 53 3.6.3 TLM Analysis of Contact Resistance across Fabrication Runs 55 3.6.4 Effect of Body Trench Dimensions on Electrical Characteristics 59 3.7 Summary 73 Chapter 4 TCAD Simulation of Electric Field and Current Distribution 75 4.1 Introduction 75 4.2 Setup of TCAD Simulation 76 4.2.1 Device Structure, Material Parameters, and Meshing 76 4.2.2 Physical Models and Bias Conditions 81 4.3 Electric Field Distribution Analysis 83 4.4 Current Density Distribution Analysis 87 Chapter 5 Conclusion and Future Work 90 5.1 Conclusion 90 5.2 Future Work 92 Reference 93 | - |
| dc.language.iso | en | - |
| dc.subject | 垂直式金氧半場效電晶體 | zh_TW |
| dc.subject | 氮化鎵 | zh_TW |
| dc.subject | 反向導通 | zh_TW |
| dc.subject | 界面陷阱密度 | zh_TW |
| dc.subject | 次臨界擺幅 | zh_TW |
| dc.subject | 臨界電壓遲滯 | zh_TW |
| dc.subject | 體溝槽 | zh_TW |
| dc.subject | threshold voltage hysteresis | en |
| dc.subject | reverse conduction | en |
| dc.subject | vertical MOSFETs | en |
| dc.subject | GaN | en |
| dc.subject | subthreshold swing | en |
| dc.subject | interface trap density | en |
| dc.subject | body trench | en |
| dc.title | 具體溝槽結構之半垂直式氮化鎵溝槽閘極金氧半場效電晶體之電性分析 | zh_TW |
| dc.title | Electrical Characterization of Quasi-Vertical Gallium Nitride Trench Gate Metal-Oxide-Semiconductor Field-Effect Transistors with a Body Trench Structure | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 113-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 吳育任;吳肇欣;賴韋志 | zh_TW |
| dc.contributor.oralexamcommittee | Yuh-Renn Wu;Chao-Hsin Wu;Wei-Chih Lai | en |
| dc.subject.keyword | 氮化鎵,垂直式金氧半場效電晶體,體溝槽,臨界電壓遲滯,次臨界擺幅,界面陷阱密度,反向導通, | zh_TW |
| dc.subject.keyword | GaN,vertical MOSFETs,body trench,threshold voltage hysteresis,subthreshold swing,interface trap density,reverse conduction, | en |
| dc.relation.page | 98 | - |
| dc.identifier.doi | 10.6342/NTU202503217 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2025-08-06 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 光電工程學研究所 | - |
| dc.date.embargo-lift | 2025-08-22 | - |
| 顯示於系所單位： | 光電工程學研究所 | |
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