基於FPGA的10GbE高吞吐量類TCP協議—應用於即時大量影像資料傳輸

Abstract

數位微鏡裝置（Digital Micromirror Device, DMD）廣泛應用於投影顯示、光學計算等領域，對即時性與高吞吐量的數據傳輸需求極為嚴苛。在此論文中，數據由電腦端的 Socket 傳送至 FPGA（Field Programmable Gate Array)，再經由 FPGA 進行數據處理後，透過 FMC（Field-Programmable Mezzanine Card）接口傳送至 DMD 顯示。為了高效率的數據傳輸，選擇適合的通訊協定至關重要。乙太網協議（Ethernet Protocol）中的 UDP（User Datagram Protocol）與 TCP（Transmission Control Protocol）是常用的解決方案，兩者在傳輸效率與錯誤控制能力上各有優劣。

在乙太網協議中，UDP雖然能提供高吞吐量，但缺乏錯誤控制機制，容易導致數據遺失或錯誤，進而影響 DMD 顯示品質或是系統設定。相較之下，TCP具備可靠的錯誤更正與流量控制機制，能確保數據傳輸的準確性，但在 FPGA 端實作完整的 TCP 協議將增加硬體資源消耗與設計複雜度。

為了解決上述的問題，本研究提出一種適用於 FPGA 的類 TCP 協議，在 PC 端使用標準 TCP/IP 堆疊（無需任何特製驅動或應用程式修改）的同時，結合 10GbE（10 Gigabit Ethernet）與 SFP+（Small Form-factor Pluggable）高速光纖通訊介面，希望能在擁有高吞吐量的同時，提供基本的錯誤監測、封包回傳的機制，以確保整個系統的穩定性。

The Digital Micromirror Device (DMD) is widely used in applications such as projection displays and optical computing, demanding stringent requirements for real-time performance and high-throughput data transmission. In this thesis, data is transmitted from the computer via a socket to the FPGA (Field Programmable Gate Array), where it undergoes processing before being sent to the DMD through the FMC (Field-Programmable Mezzanine Card) interface for display. Selecting an appropriate communication protocol is crucial for efficient data transmission. UDP (User Datagram Protocol) and TCP (Transmission Control Protocol) under the Ethernet protocol are commonly used solutions, each with its own advantages and disadvantages in terms of transmission efficiency and error control capability.

In the Ethernet protocol, while UDP can provide high throughput, it lacks error control mechanisms, making it prone to data loss or errors, which can negatively impact the quality of the DMD display or system configuration. In contrast, TCP offers reliable error correction and flow control mechanisms, ensuring accurate data transmission. However, implementing a complete TCP protocol stack on an FPGA increases hardware resource consumption and design complexity.

To address these challenges, this study proposes an FPGA-tailored TCP-like protocol that—while fully compatible with the PC’s standard TCP/IP stack (requiring no custom drivers or application changes)—leverages 10 GbE and SFP+ high-speed optical interfaces to achieve high throughput and incorporates essential error-detection and packet-retransmission mechanisms to ensure overall system stability.