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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 胡振國 | zh_TW |
| dc.contributor.advisor | Jenn-Gwo Hwu | en |
| dc.contributor.author | 王文彥 | zh_TW |
| dc.contributor.author | Wen-Yen Wang | en |
| dc.date.accessioned | 2025-07-16T16:12:29Z | - |
| dc.date.available | 2025-07-17 | - |
| dc.date.copyright | 2025-07-16 | - |
| dc.date.issued | 2025 | - |
| dc.date.submitted | 2025-07-08 | - |
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[2] X. X. Sun et al., "Reconfigurable logic-in-memory architectures based on a two-dimensional van der Waals heterostructure device," (in English), Nat. Electron., Article vol. 5, no. 11, pp. 752-+, Nov 2022, doi: 10.1038/s41928-022-00858-z. [3] W. Cao, J. H. Chu, K. Parto, and K. Banerjee, "A mode-balanced reconfigurable logic gate built in a van der Waals strata," (in English), npj 2D Mater. Appl., Article vol. 5, no. 1, p. 7, Feb 2021, Art no. 20, doi: 10.1038/s41699-020-00198-6. [4] S. F. Zeng, C. S. Liu, X. H. Huang, Z. W. Tang, L. W. Liu, and P. Zhou, "An application-specific image processing array based on WSe2 transistors with electrically switchable logic functions," (in English), Nat. Commun., Article vol. 13, no. 1, p. 9, Jan 2022. [Online]. Available: <Go to ISI>://WOS:001028263400003. [5] W. Y. Kim et al., "Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations," (in English), Nat. Commun., Article vol. 7, p. 6, Jan 2016, Art no. 10429, doi: 10.1038/ncomms10429. [6] S. Rehman et al., "Optically Reconfigurable Complementary Logic Gates Enabled by Bipolar Photoresponse in Gallium Selenide Memtransistor," (in English), Adv. Sci., Article vol. 10, no. 17, p. 10, Jun 2023, doi: 10.1002/advs.202205383. [7] C. S. Liu et al., "Small footprint transistor architecture for photoswitching logic and in situ memory," (in English), Nat. Nanotechnol., Article vol. 14, no. 7, pp. 662-+, Jul 2019, doi: 10.1038/s41565-019-0462-6. [8] S. Y. Guo et al., "Stretchable reconfigurable logic gate based on near-infrared photoelectric modulation," (in English), Nano Energy, Article vol. 110, p. 8, Jun 2023, Art no. 108361, doi: 10.1016/j.nanoen.2023.108361. [9] C. H. Wann, K. Noda, T. Tanaka, M. Yoshida, and C. M. Hu, "A comparative study of advanced MOSFET concepts," (in English), IEEE Trans. Electron Devices, Article vol. 43, no. 10, pp. 1742-1753, Oct 1996. [Online]. Available: <Go to ISI>://WOS:A1996VH84600018. [10] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices. Wiley, 2006, pp. 293 373. [11] A. E. Varfolomeev, A. A. Vasiliev, N. Zaretskiy, and W. Moritz, "CO2 Gas Sensor Based on MIS Structure with LaF3 Layer," Procedia Engineering, vol. 87, pp. 1047-1050, 2014/01/01/ 2014, doi: https://doi.org/10.1016/j.proeng.2014.11.341. [12] V. V. Andreev, G. G. Bondarenko, D. V. Andreev, and D. M. Akhmelkin, "Sensors based on MIS structures for study of ionization radiations," in 2018 Moscow Workshop on Electronic and Networking Technologies (MWENT), 14-16 March 2018 2018, pp. 1-3, doi: 10.1109/MWENT.2018.8337203. [13] P. Dimitrakis et al., "MOS memory structures by very-low-energy-implanted Si in thin SiO2," (in English), Mater. Sci. Eng. B-Solid State Mater. Adv. Technol., Article; Proceedings Paper vol. 101, no. 1-3, pp. 14-18, Aug 2003, doi: 10.1016/s0921-5107(02)00688-8. [14] M. Koyanagi, H. Sunami, N. Hashimoto, and M. Ashikawa, "Novel high density, stacked capacitor MOS RAM," in 1978 International Electron Devices Meeting, 4-6 Dec. 1978 1978, pp. 348-351, doi: 10.1109/IEDM.1978.189425. [15] C. H. Lin and C. W. Liu, "Metal-Insulator-Semiconductor Photodetectors," (in English), Sensors, Review vol. 10, no. 10, pp. 8797-8826, Oct 2010, doi: 10.3390/s101008797. [16] Y. K. Lin and J. G. Hwu, "Photosensing by Edge Schottky Barrier Height Modulation Induced by Lateral Diffusion Current in MOS(p) Photodiode," (in English), IEEE Trans. Electron Devices, Article vol. 61, no. 9, pp. 3217-3222, Sep 2014, doi: 10.1109/ted.2014.2334704. [17] T. M. Kung and J. G. Hwu, "Control of current polarity in concentric metal-insulator semiconductor tunnel diode (MISTD) structures by designed coupling rings," (in English), Appl. Phys. A-Mater. Sci. Process., Article vol. 131, no. 1, p. 8, Jan 2025, Art no. 9, doi: 10.1007/s00339-024-08139-6. [18] Y. C. Lin and J. G. Hwu, "Current Polarity Changeable Concentric MIS Tunnel Photodiode With Linear Photodetectivity via Inner Gate Biasing and Outer Ring Short Circuit Operation," (in English), IEEE Trans. Electron Devices, Article vol. 70, no. 10, pp. 5184-5189, Oct 2023, doi: 10.1109/ted.2023.3306320. [19] F. Gaspard, A. Halimaoui, and G. Sarrabayrouse, "ELECTRICAL-PROPERTIES OF THIN ANODIC SILICON DIOXIDE LAYERS GROWN IN PURE WATER," (in English), Revue De Physique Appliquee, Article vol. 22, no. 1, pp. 65-69, Jan 1987. [Online]. Available: <Go to ISI>://WOS:A1987F660500008. [20] K. Ohnishi, A. Ito, Y. Takahashi, and S. Miyazaki, "Growth and characterization of anodic oxidized films in pure water," (in English), Jpn. J. Appl. Phys. Part 1 - Regul. Pap. Brief Commun. Rev. Pap., Article vol. 41, no. 3A, pp. 1235-1240, Mar 2002, doi: 10.1143/jjap.41.1235. [21] W. J. Guo, S. K. Anantharajan, K. Liu, and H. Deng, "Investigation of Electrochemical Oxidation Behaviors and Mechanism of Single-Crystal Silicon (100) Wafer under Potentiostatic Mode," (in English), Coatings, Article vol. 10, no. 6, p. 14, Jun 2020, Art no. 586, doi: 10.3390/coatings10060586. [22] C. F. Yang and J. G. Hwu, "Role of fringing field on the electrical characteristics of metal-oxide-semiconductor capacitors with co-planar and edge-removed oxides," (in English), AIP Adv., Article vol. 6, no. 12, p. 7, Dec 2016, Art no. 125017, doi: 10.1063/1.4971845. [23] S. M. Sze, Semiconductor Devices: Physics and Technology. John Wiley & Sons Singapore Pte. Limited, 2012, pp. 229-230. [24] M. Y. Doghish and F. D. Ho, "A comprehensive analytical model for metal-insulator-semiconductor (MIS) devices: a solar cell application," IEEE Trans. Electron Devices, vol. 40, no. 8, pp. 1446-1454, 1993, doi: 10.1109/16.223704. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/97769 | - |
| dc.description.abstract | 本論文探討同心環金氧半穿隧二極體結構中的電壓與電流耦合行為，並進一步分析其於可重構邏輯閘之應用潛力，研究中製作並比較了兩種結構：一般平面元件與去除邊緣氧化層元件。
第二章中，針對中心與外環之間的耦合機制進行分析，實驗顯示，當適當固定中心偏壓與調整外環電壓時，因穿隧電子流與橫向耦合電子流之間的競爭，中心電流可能出現極性反轉現象，此為邏輯閘運作的基礎，並且針對此現象做理論解釋以及證實了該種邏輯閘的低功耗。第三章中，引入可見光作為額外控制參數，照光產生額外光生載子，進一步調變橫向耦合電子流，實現以光控制的電流極性轉換，從實驗結果可得出，一般平面結構元件在不同光照條件下展現穩定且明確的邏輯切換；相較之下，去除邊緣氧化層結構元件在強光下且所有外環接地時，中心電流無法維持穩定極性，導致邏輯判別不明確，限制其邏輯應用的穩定性。另外，一般平面結構元件在不同輸入與照光條件下皆具有低功率密度，並於連續切換操作下維持穩定輸出，顯示良好的耐久性。第四章中，總結了上述結果，並且提出此研究未來方向之建議。 | zh_TW |
| dc.description.abstract | This thesis investigates the voltage-current coupling behavior in concentric ring metal-insulator-semiconductor tunnel diode (MISTD) structures and further analyzes their potential applications in reconfigurable logic gates. Two types of device structures were fabricated and compared: the planar structure and the edge-removed structure.
In Chapter 2, the coupling mechanism between the center and the ring was analyzed. Experimental results show that when the center bias is appropriately fixed and the ring voltage is adjusted, the competition between tunneling electron flow and lateral coupling electron flow can lead to polarity switch in the center current. This phenomenon serves as the basis for logic gate operation. Theoretical explanations were provided, and the low power characteristics of such logic gates were confirmed. In Chapter 3, visible light was introduced as an additional control parameter. Illumination generates additional photogenerated carriers, further increasing the lateral coupling electron flow and enabling light-induced current polarity switching. The experimental results demonstrate that the planar structure exhibits stable and distinct logic transitions under varying illumination conditions. In contrast, the edge-removed structure fails to maintain stable current polarity under strong illumination when all rings are grounded, leading to ambiguous logic states and limited stability in logic applications. The planar structure shows low power density across different input and illumination conditions and maintains stable output under repeated switching operations, confirming its stability. Chapter 4 summarizes the findings and provides suggestions for future research directions. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-07-16T16:12:29Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-07-16T16:12:29Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 口試委員會審定書 I
誌謝 II 摘要 III Abstract IV Contents VI Table Captions VIII Figure Captions IX Chapter 1 Introduction 1 1-1 Motivation and Thesis Organization 2 1-2 Materials and Fabrication of MISTD Dielectric Layers 4 1-3 IV Characteristic of MIS(p) Tunnel Diodes 6 1-3-1 Planar and Edge-Removed Oxides 6 1-3-2 Effect of Oxide Thickness on MISTD 7 1-3-3 Effect of Light on MISTD 9 1-4 Fringing Field Effect 10 1-5 Summary 11 Chapter 2 Current Coupling Effect of Multi-Ring MISTDs 16 2-1 Introduction 17 2-2 Experimental 18 2-3 Results and Discussion 19 2-3-1 Effect of Ring Voltage on Center Current 20 2-3-2 Coupling Current-Voltage Characteristics and Physical Mechanism in the PL Structure 21 2-3-3 Coupling Current-Voltage Characteristics and Physical Mechanism in the ER Structure 23 2-3-4 Logic Gates Applications 26 2-3-5 Power Consumption and Endurance 28 2-4 Summary 30 Chapter 3 Light-Controlled Logic Operations in Multi-Ring MISTD 47 3-1 Introduction 48 3-2 Results and Discussion 48 3-2-1 Light-Induced Current-Voltage Coupling in the PL Structure 49 3-2-2 Light-Induced Current-Voltage Coupling in the ER Structure 50 3-2-3 Physical Mechanism of Light-Induced Current-Voltage Coupling Characteristics 52 3-2-4 Power Consumption and Stability 53 3-3 Summary 54 Chapter 4 Conclusion and Future Work 65 4-1 Conclusion 66 4-2 Future Work 67 4-2-1 Asymmetric Ring Distances 67 4-2-2 Different Light Wavelengths 68 References 69 | - |
| dc.language.iso | en | - |
| dc.subject | 可重構邏輯閘 | zh_TW |
| dc.subject | 光控制 | zh_TW |
| dc.subject | 去除邊緣氧化層 | zh_TW |
| dc.subject | 耦合行為 | zh_TW |
| dc.subject | 金氧半穿隧二極體 | zh_TW |
| dc.subject | light-induced | en |
| dc.subject | metal-insulator-semiconductor tunnel diode | en |
| dc.subject | coupling behavior | en |
| dc.subject | edge-removed | en |
| dc.subject | reconfigurable logic gates | en |
| dc.title | 基於光與偏壓控制耦合之同心環狀金氧半穿隧二極體結構的邏輯閘設計 | zh_TW |
| dc.title | Logic Gates Based on Light and Bias Controlled Coupling in Concentric Ring Metal-Insulator-Semiconductor Tunnel Diode Structures | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 113-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 李坤彥;吳幼麟 | zh_TW |
| dc.contributor.oralexamcommittee | Kung-Yen Lee;You-Lin Wu | en |
| dc.subject.keyword | 金氧半穿隧二極體,耦合行為,去除邊緣氧化層,可重構邏輯閘,光控制, | zh_TW |
| dc.subject.keyword | metal-insulator-semiconductor tunnel diode,coupling behavior,edge-removed,reconfigurable logic gates,light-induced, | en |
| dc.relation.page | 73 | - |
| dc.identifier.doi | 10.6342/NTU202501574 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2025-07-10 | - |
| dc.contributor.author-college | 重點科技研究學院 | - |
| dc.contributor.author-dept | 元件材料與異質整合學位學程 | - |
| dc.date.embargo-lift | 2025-07-17 | - |
| 顯示於系所單位： | 元件材料與異質整合學位學程 | |
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