應用於擴增實境與虛擬實境顯示技術之微型發光二極體驅動晶片與系統設計

Abstract

本論文旨在探討一套完整的微發光二極體(Micro-LED)驅動電路與系統設計開發流程，涵蓋實驗初期採用TFT玻璃基板之設計，後續開發以矽基(silicon-based) CMOS類比驅動晶片搭配FPGA數位電路為主軸，透過PCB設計與wire bonding技術整合Micro-LED晶片，完成被動式驅動系統開發。最終成功驅動單顆尺寸為 50 µm 的Micro-LED陣列。 初期實驗以TFT玻璃基板進行設計，完成包含GOA(Gate on Array)電路與主動式2T1C像素架構之面板，並搭配DRC command file開發，完成電路設計與驗證。隨後類比電路轉向以UMC 0.18 µm製程矽基CMOS晶片作為Data Driver，設計輸出可對應亮度之電壓信號來驅動Micro-LED，其中電路包含數位類比轉換器、運算放大器、類比電壓緩衝器等；數位電路則整合TCON與Scan Driver模組，產生驅動系統所需控制時序訊號，包含邊緣偵測器、去雜訊電路與有限狀態機(FSM)等控制單元。在本論文整合兩種主流的Micro-LED調光方案，使用PWM與PAM混合調光被動式電壓驅動技術，實現更新率為60 Hz之5x5 Micro-LED陣列驅動系統，並且透過外部補償解決Micro-LED顯示畫面均勻度之問題。 本論文也針對Full custom設計流程、FPGA設計流程與PCB設計流程進行介紹，包含類比晶片Layout優化過程、數位電路設計時的考量和PCB規劃與系統整合細節。

This thesis presents the complete development of a Micro-LED driver circuit and system. The work begins with an early prototype based on a TFT glass substrate, then transitions to a silicon-based CMOS analog driver IC integrated with FPGA digital control. Using PCB design and wire bonding, a passive driving system was successfully implemented, enabling operation of a Micro-LED array consisting of 50 µm Micro-LED chips. The initial design includes a GOA (Gate on Array) and 2T1C pixel structure, with circuit verification completed using a self-developed DRC command flow. The analog driver, fabricated using UMC 0.18 µm CMOS technology, outputs brightness-controllable voltage signals through DACs, OPAs, and analog buffers. The FPGA-based digital subsystem integrates TCON and Scan Driver modules, including edge detection, debounce circuits, and FSMs to generate necessary timing signals. This thesis combines two widely used Micro-LED dimming techniques, adopting a hybrid PWM and PAM passive voltage-driving approach. A 5×5 Micro-LED array operating at 60 Hz was successfully implemented, with external compensation applied to improve display uniformity. The thesis also details the full-custom analog IC design process, FPGA control logic, and PCB integration, including layout optimization and system-level design considerations.