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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96633| 標題: | 適用於第五代行動通訊相位陣列發射器之28 GHz低誤差可變增益相移器和具有增益及相位補償之功率放大器 A 28 GHz Low-Error Variable-Gain Phase Shifter and Power Amplifier with Gain and Phase Compensation for 5G Phased Array Transmitters |
| 作者: | 李政頡 Zheng-Jie Li |
| 指導教授: | 呂良鴻 Liang-Hung Lu |
| 關鍵字: | 相位陣列,射頻相移,功率放大器,相移器,可變增益放大器,線性度,相位誤差,增益誤差, Phased array,RF-phase shifting,Power amplifier,Phase shifter,Variable-gain amplifier,Linearity,Phase error,Gain error, |
| 出版年 : | 2024 |
| 學位: | 碩士 |
| 摘要: | 由於高速、低延遲的資料傳輸需求不斷增加,因此毫米波頻段收發器成為關鍵技術,本論文討論了採用TSMC 90-nm CMOS製程製造之適用於第五代行動通訊相位陣列發射器之28 GHz功率放大器、可變增益放大器以及相移器。
本論文所提出之功率放大器採用適應性偏壓和相位補償來降低振幅失真(AM-AM distortion)以及相位失真(AM-PM distortion)。論文所設計之功率放大器其增益為23.1 dB,而頻寬則為26至29 GHz,並在28 GHz時實現了35.1%的峰值功率附加效率和15.2 dBm的飽和輸出功率。此功率放大器在1 dB增益壓縮點的輸出功率(OP1dB)為14.4 dBm,並且此時的功率附加效率(PAEP1dB)為33.6%。最後,在1 dB增益壓縮點以前,論文所設計之功率放大器實現了小於1.5°的相位失真。 而本論文所提出之相移器利用兩個相位差為四十五度的向量進行相位合成,相較於傳統上使用相位差為九十度的向量進行相位合成,此方法可以有效降低相位誤差和增益誤差。另一方面,透過抵銷和彌補電晶體的閘極-源極間電容(Cgs)以及閘極-汲極間電容(Cgd)之影響,本論文所提出之可變增益放大器有效減少了其在增益控制範圍內的相位變化。論文所提出之可變增益相移器其增益為−9.5 dB,而頻寬則為25至31 GHz。在此頻寬內,此電路實現了小於0.34°的方均根相位誤差以及小於0.38 dB的方均根增益誤差。此電路同時實現了16 dB的增益控制範圍,並且在其頻寬以及增益控制範圍內,此電路的相位變化小於1.8°。 最後,本論文再提出了一種將可變增益放大器和相移器結合在單一電路模塊中的方法,此方法可以有效降低功耗和面積。論文所設計之發射器其增益為16.5 dB,其實現了27.1%的峰值功率附加效率和16.1 dBm的飽和輸出功率。此發射器在1 dB增益壓縮點的輸出功率為15 dBm,並且此時的功率附加效率為24%。對於波束控制功能,此發射器實現了小於0.2°的方均根相位誤差以及小於0.2 dB的方均根增益誤差。此電路同時實現了16 dB的增益控制範圍,並且在其頻寬以及增益控制範圍內,此電路的相位變化小於1.25°。 The increasing demand for high-data-rate, low-latency applications has elevated millimeter-wave transceivers to a pivotal technology. The 28 GHz power amplifier, variable-gain amplifier and phase shifter fabricated in TSMC 90-nm CMOS process for 5G wireless communication phased array transmitters are discussed in this thesis. The proposed power amplifier employs adaptive bias and phase compensation to reduce AM-AM distortion and AM-PM distortion. The proposed PA has a peak gain of 23.1 dB with a bandwidth from 26 to 29 GHz. It achieves a peak power-added efficiency (PAE) of 35.1% and a saturated output power of 15.2 dBm at 28 GHz. Its output power (OP1dB) and PAE at the 1-dB compression point are 14.4 dBm and 33.6%, respectively. Furthermore, the AM-PM distortion of the proposed power amplifier is less than 1.5° before the P1dB. The proposed phase shifter utilizes two vectors with a 45-degree phase difference for phase synthesis, which can effectively reduce both phase and gain errors. On the other hand, by mitigating the influence of Cgs and Cgd, the phase variation of the proposed variable-gain amplifier within its gain control range is effectively minimized. The proposed variable-gain phase shifter has a peak gain of −9.5 dB with a bandwidth from 25 to 31 GHz. The RMS phase error and RMS gain error of the proposed circuit are less than 0.34° and 0.38 dB, respectively. Within its 16 dB gain control range, the phase variation of the proposed circuit is less than 1.8°. Finally, a method for combining the variable-gain amplifier and phase shifter into a single block is proposed to further reduce power consumption and area. The proposed transmitter has a peak gain of 16.5 dB. It achieves a peak transmitter PAE of 27.1% and a saturated output power of 16.1 dBm. Its OP1dB and transmitter PAEP1dB are 15 dBm and 24%, respectively. The RMS phase error and RMS gain error of the proposed transmitter are less than 0.2° and 0.2 dB, respectively. Within its 16 dB gain control range, the phase variation of the proposed circuit is less than 1.25°. |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96633 |
| DOI: | 10.6342/NTU202500068 |
| 全文授權: | 未授權 |
| 電子全文公開日期: | N/A |
| 顯示於系所單位: | 電子工程學研究所 |
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| ntu-113-1.pdf 未授權公開取用 | 10.03 MB | Adobe PDF |
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