中心局部氧化層薄化同心圓環閘金氧半穿隧二極體之暫態電流強化行為及其記憶體應用

Abstract

本論文探討了同心圓環閘極金屬-氧化層-半導體穿隧二極體在中心局部氧化層薄化製程後的暫態電流增強行為。在第一章中，我們首先回顧了傳統平面氧化層的金氧半穿隧二極體元件的基本電性，例如在逆偏壓條件下厚度與電流之間的關係等，並解釋耦合元件特性和局部氧化層薄化理論基礎。文獻回顧部分指出，這些特殊結構的金氧半穿隧二極體在瞬態電流強化行為為記憶體元件的應用提供了理論支持。在第二章中，我們製作了同心圓環電極結構的金氧半穿隧二極體並解釋製造流程，元件包含了內圓及外環結構。量測使用Agilent B1500A半導體裝置分析儀進行實驗數據的收集並分析其基本電特性，例如I-V和I-t曲線。本論文分析中心局部氧化層薄化製程前後的變化，特別是在暫態電流強化行為方面，發現在較厚氧元件在中心局部氧化層薄化後出現了明顯暫態電流強化行為。在此章節透過穩態及暫態量測結果分析其機制，並對元件進行可靠度測試。在第三章中，先透過SILVACO TCAD 軟體模擬元件的穩態及暫態電流，近一步解釋在較厚氧元件在中心局部氧化層薄化後的暫態電流強化行為。為說明其機制，擷取了元件模擬提供的暫態及穩態特性，如位移電流、穿隧電流和電子濃度等。為驗證內圓及外環之間耦合的必要性，我們提出在實驗中對耦合元件進行了閘極邊緣氧化層的移除，使其耦合效應減弱。結果發現在中心局部氧化層薄化後，元件未出現暫態電流強化行為，從而證實了耦合的必要性。最後，我們針對局部氧化層薄化效應進行實驗及TCAD模擬驗證，確認兩者結果的一致性。第四章總結了中心局部氧化層薄化後的耦合元件在暫態電流強化行為方面的表現，顯示其在動態記憶體應用中的潛力。此外，本章還探討了未來可能的研究方向和應用，提出了進一步優化這些元件性能的潛在策略，以及探索新的記憶體技術的可能性。這些討論不僅表明了中心局部氧化層薄化的重要性，也提供了未來的研究參考。

This thesis explores the transient current enhancement behavior of concentric gate metal-oxide-semiconductor (MIS) tunneling diodes (TD) following an oxide local thinning (OLT) process. In Chapter 1, we first review the basic electrical properties of traditional planar oxide MISTD devices, such as the relationship between thickness and current under reverse bias conditions, and explain the characteristics of coupled devices and the theoretical basis of OLT. The literature review highlights that these specialized structures provide theoretical support for memory device applications due to their enhanced transient current behavior. In Chapter 2, we fabricated concentric gate MISTD and described the manufacturing process, which includes both an inner circle and an outer ring structures. Using an Agilent B1500A semiconductor device analyzer, we collected and analyzed experimental data according to the electrical characteristics of such as I-V and I-t curves, and then examined the changes before and after the oxide local thinning process, particularly in terms of transient current enhancement behavior. Significant transient current enhancement was observed in devices with thicker oxide after OLT. This chapter analyzes the mechanisms through steady-state and transient measurement results and conducts reliability tests. In Chapter 3, we initially simulated the steady-state and transient currents of the devices using SILVACO TCAD simulation, further explaining the transient current enhancement behavior in devices with thicker oxide after central OLT. To elucidate the mechanisms, we extracted simulated transient and steady-state characteristics, such as displacement current, tunneling current, and electron concentration. To verify the necessity of coupling between the inner circle and the outer ring, we conducted experiments to remove the gate edge oxide layer of the coupled devices, which effectively reduced their coupling effect. The results showed that there was no transient current enhancement behavior even after central localized oxide thinning for this structure, thereby confirming the necessity of coupling. Finally, we conducted experiments and TCAD simulations on the localized oxide thinning effect to confirm the consistency of both results. Chapter 4 summarizes the performance of coupled devices in enhancing transient current behavior after central localized oxide thinning, demonstrating their potential in dynamic memory applications. Additionally, this chapter explores possible future research directions and applications, proposing potential strategies to further optimize the performance of these devices and explore new memory technologies. These discussions not only highlight the importance of central localized oxide thinning but also serve as a reference for future research.