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| ???org.dspace.app.webui.jsptag.ItemTag.dcfield??? | Value | Language |
|---|---|---|
| dc.contributor.advisor | 洪士灝 | zh_TW |
| dc.contributor.advisor | Shih-Hao Hung | en |
| dc.contributor.author | 劉盛興 | zh_TW |
| dc.contributor.author | Sheng-Hsing Liu | en |
| dc.date.accessioned | 2024-08-14T16:28:12Z | - |
| dc.date.available | 2024-08-15 | - |
| dc.date.copyright | 2024-08-13 | - |
| dc.date.issued | 2024 | - |
| dc.date.submitted | 2024-08-07 | - |
| dc.identifier.citation | [1] A. Adedoyin, J. Ambrosiano, P. Anisimov, W. Casper, G. Chennupati, C. Coffrin, H. Djidjev, D. Gunter, S. Karra, N. Lemons, et al. Quantum algorithm implementations for beginners. arXiv preprint arXiv:1804.03719, 2018.
[2] T. Alexander, N. Kanazawa, D. J. Egger, L. Capelluto, C. J. Wood, A. Javadi-Abhari, and D. C. McKay. Qiskit pulse: programming quantum computers through the cloud with pulses. Quantum Science and Technology, 5(4):044006, 2020. [3] F. Arute, K. Arya, R. Babbush, D. Bacon, J. C. Bardin, R. Barends, R. Biswas, S. Boixo, F. G. Brandao, D. A. Buell, et al. Quantum supremacy using a programmable superconducting processor. Nature, 574(7779):505–510, 2019. [4] B. Bauer, D. Wecker, A. J. Millis, M. B. Hastings, and M. Troyer. Hybrid quantum-classical approach to correlated materials. Physical Review X, 6(3):031045, 2016. [5] P. Corbett, D. Feitelson, S. Fineberg, Y. Hsu, B. Nitzberg, J.-P. Prost, M. Snirt, B. Traversat, and P. Wong. Overview of the mpi-io parallel i/ o interface. Input/Output in Parallel and Distributed Computer Systems, pages 127–146, 1996. [6] H. De Raedt, F. Jin, D. Willsch, M. Willsch, N. Yoshioka, N. Ito, S. Yuan, and K. Michielsen. Massively parallel quantum computer simulator, eleven years later. Computer Physics Communications, 237:47–61, 2019. [7] K. De Raedt, K. Michielsen, H. De Raedt, B. Trieu, G. Arnold, M. Richter, T. Lippert, H. Watanabe, and N. Ito. Massively parallel quantum computer simulator. Computer Physics Communications, 176(2):121–136, 2007. [8] E. Farhi, J. Goldstone, and S. Gutmann. A quantum approximate optimization algorithm. arXiv preprint arXiv:1411.4028, 2014. [9] gilr8 and others. Perfest package. https://github.com/linux-rdma/perftest? tab=readme-ov-file. [10] G. G. Guerreschi, F. Baruffa, et al. Intel quantum simulator (intel-qs), also known as qhipster (the quantum high performance software testing environment), is a simulator of quantum circuits optimized to take maximum advantage of multi-core and multi-nodes architectures. https://github.com/intel/intel-qs. [11] G. G. Guerreschi, J. Hogaboam, F. Baruffa, and N. P. Sawaya. Intel quantum simulator: A cloud-ready high-performance simulator of quantum circuits. Quantum Science and Technology, 5(3):034007, 2020. [12] C.-H. Hsu, C.-C. Wang, N.-W. Hsu, C.-H. Tu, and S.-H. Hung. Towards scalable quantum circuit simulation via rdma. In Proceedings of the 2023 International Conference on Research in Adaptive and Convergent Systems, pages 1–8, 2023. [13] N.-W. Hsu. Quokka: a file-based quantum computing simulator. Master’s thesis, National Taiwan University (NTU), 2023. [14] S. Imamura, M. Yamazaki, T. Honda, A. Kasagi, A. Tabuchi, H. Nakao, N. Fukumoto, and K. Nakashima. mpiqulacs: A distributed quantum computer simulator for a64fx-based cluster systems. arXiv preprint arXiv:2203.16044, 2022. [15] T. Jones, A. Brown, I. Bush, and S. C. Benjamin. Quest and high performance simulation of quantum computers. Scientific reports, 9(1):10736, 2019. [16] T. Jones et al. Quest is a multithreaded, distributed, gpu-accelerated simulator of quantum computers. https://github.com/QuEST-Kit/QuEST/tree/master. [17] N. Khammassi, I. Ashraf, J. Someren, R. Nane, A. Krol, M. A. Rol, L. Lao, K. Bertels, and C. G. Almudever. Openql: A portable quantum programming framework for quantum accelerators. ACM Journal on Emerging Technologies in Computing Systems (JETC), 18(1):1–24, 2021. [18] MPICH Development Team. MPICH documentation. https://www.mpich.org/static/docs/v3.3/. [19] Nvidia. HPC-X. https://developer.nvidia.com/networking/hpc-x. [20] D. Park, H. Kim, J. Kim, T. Kim, and J. Lee. Snuqs: scaling quantum circuit simulation using storage devices. In Proceedings of the 36th ACM International Conference on Supercomputing, pages 1–13, 2022. [21] P. W. Shor. Algorithms for quantum computation: discrete logarithms and factoring. In Proceedings 35th annual symposium on foundations of computer science, pages 124–134. Ieee, 1994. [22] P. W. Shor. Polynomial-time algorithms for prime factorization and discrete logarithms on a quantum computer. SIAM review, 41(2):303–332, 1999. [23] M. Smelyanskiy, N. P. Sawaya, and A. Aspuru-Guzik. qhipster: The quantum high performance software testing environment. arXiv preprint arXiv:1601.07195, 2016. [24] D. S. Steiger, T. Häner, and M. Troyer. Projectq: an open source software framework for quantum computing. Quantum, 2:49, 2018. [25] TOP500. FORERUNNER 1. https://top500.org/system/180235/. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/94056 | - |
| dc.description.abstract | 隨著計算需求的增加,傳統的處理器或許有一天不再能滿足人們的需求。而量子電腦作為一種新的計算平台,擁有在處理複雜問題上的巨大潛力。然而,目前量子電腦的位元數受限,無法快速的發展演算法成為眼下的問題。模擬器在此時扮演著重要的角色,使得研究者可以方便 dubug 與評估量子電路,成為進行量子相關研究重要的工具。
本研究在以記憶體或檔案方式儲存完整量子狀態的方法之上,研發分散式的量子模擬器。我們使用多節點拓展更多可模擬之量子位元數量並降低所需模擬電路的時間。就我所知,這是目前僅有可同時支援這兩種方式的模擬器。而在分散式量子模擬器當中,如何減少節點之間資料交換的成本是最大的挑戰。為了降低溝通與本機操作所需時間,我們透過實作有效率的資料交換方式並且避免掉不必要的讀寫以及改善平行化。此外,透過 gate blocking (GB) 的方法與特殊的 Swap操作,我們可以大量減少 I/O 與溝通次數,整體相較於 QuEST可以達到接近三倍的速度提升。 | zh_TW |
| dc.description.abstract | As computational demands grow, traditional processors may one day struggle to meet people's needs. Quantum computers, as a new computing platform, hold tremendous potential for solving complex problems. However, the current limitation on the number of qubits in quantum computers hampers rapid algorithm development, presenting a significant challenge. Simulators play a vital role at this juncture, enabling researchers to conveniently debug and evaluate quantum circuits, serving as essential tools for quantum-related studies. In this study, we develop a distributed quantum simulator built upon methods for storing complete quantum states in memory or files. We employ multi-node architectures to expand the number of qubits that can be simulated and reduce the simulation time for complex circuits. To our knowledge, this simulator is the only one that can simultaneously support both storage methods. In distributed quantum simulation, minimizing the cost of data exchange between nodes is a major challenge. To reduce the time required for communication and local operations, we implement efficient data exchange methods, avoid unnecessary read-write operations, and improve parallelization. Additionally, through the use of gate blocking (GB) techniques and specialized Swap operations, we can significantly reduce I/O and communication overheads, achieving nearly a three-fold speed improvement compared to QuEST. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-08-14T16:28:12Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2024-08-14T16:28:12Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | Acknowledgements i
摘要 ii Abstract iii Contents v List of Figures vii List of Tables ix Chapter 1 Introduction 1 Chapter 2 Background 3 2.1 State Vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Existing Distributed State Vector Simulators . . . . . . . . . . . . . 4 2.2.1 QuEST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2.2 Intel-QS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2.3 mpiQulacs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 Gate Blocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Chapter 3 Methodology 8 3.1 Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.1 Qubit Representation . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.2 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Implementation of Distributed Simulation . . . . . . . . . . . . . . . 13 3.2.1 Parallel Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2.2 Global One-Qubit Gate . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2.3 Global Two-Qubit Unitary Gate . . . . . . . . . . . . . . . . . . . 17 3.3 Performance Optimization Strategies . . . . . . . . . . . . . . . . . 19 3.3.1 Other Communication Strategy . . . . . . . . . . . . . . . . . . . . 19 3.3.2 Transmission of Swap Gate . . . . . . . . . . . . . . . . . . . . . . 21 3.3.3 Reducing I/O through Matrix Properties . . . . . . . . . . . . . . . 22 Chapter 4 Evaluation 24 4.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.2 Evaluation of Performance Optimization Strategies . . . . . . . . . . 26 4.2.1 Leveraging Matrix Property to Reduce I/O Operations . . . . . . . . 26 4.2.2 Communication Strategy Evaluation . . . . . . . . . . . . . . . . . 26 4.3 Scalability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.3.1 Strong Scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.3.2 Weak Scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.4 Overall Performance . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.4.1 H Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.4.2 QFT and QAOA . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Chapter 5 Conclusion 38 References 39 | - |
| dc.language.iso | en | - |
| dc.subject | 分散式運算 | zh_TW |
| dc.subject | 平行運算 | zh_TW |
| dc.subject | 量子電路模擬器 | zh_TW |
| dc.subject | 效能分析 | zh_TW |
| dc.subject | 量子模擬 | zh_TW |
| dc.subject | Quantum Simulation | en |
| dc.subject | Performance Analysis | en |
| dc.subject | Quantum Circuit Simulator | en |
| dc.subject | Distributed Computing | en |
| dc.subject | Parallel Computing | en |
| dc.title | 最佳化計算叢集中的量子電路分散式模擬 | zh_TW |
| dc.title | Optimizing Distributed Simulation of Quantum Circuits on Computing Clusters | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 112-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 江介宏;涂嘉恒 | zh_TW |
| dc.contributor.oralexamcommittee | Jie-Hong Jiang;Chia-Heng Tu | en |
| dc.subject.keyword | 平行運算,分散式運算,量子模擬,效能分析,量子電路模擬器, | zh_TW |
| dc.subject.keyword | Parallel Computing,Distributed Computing,Quantum Simulation,Performance Analysis,Quantum Circuit Simulator, | en |
| dc.relation.page | 42 | - |
| dc.identifier.doi | 10.6342/NTU202403579 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2024-08-11 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 資訊工程學系 | - |
| Appears in Collections: | 資訊工程學系 | |
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| File | Size | Format | |
|---|---|---|---|
| ntu-112-2.pdf Restricted Access | 2.99 MB | Adobe PDF |
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