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標題: | 60奈米部分解離絕緣體上N型矽金氧半元件閘極穿隧漏電流行為分析 Gate Direct Tunneling Leakage Behavior Analysis of 60nm PD SOI NMOS Device |
作者: | Hung-Jin Hung 洪弘晉 |
指導教授: | 郭正邦 |
關鍵字: | 閘極漏電流,部分解離絕緣體上金氧半元件, gate tunneling leakage,PD SOI, |
出版年 : | 2009 |
學位: | 碩士 |
摘要: | 在本論文中,描述使用淺壕溝隔離技術(shallow trench isolation)
之60奈米部分解離絕緣體上N型矽金氧半元件(partially depleted silicon on insulator device)之閘極漏電流(gate direct tunneling leakage)模型及分析。首先,絕緣體上矽金氧半(SOI)元件的演進及元件特性和閘極氧化層(gate oxide)厚度及其相對應閘極漏電流(gate tunneling leakage)趨勢在第一章中介紹。第二章將討論浮動基極效應(floating body effect)對60奈米部分解離絕緣體上N型矽金氧半元件(SOI)閘極漏電流(gate tunneling leakage)的影響。由實驗據及2D元件模擬軟體分析,元件內部寄生雙載子電晶體(parasitic bipolar transistor)的導通除了產生kink效應外,也影響著閘極漏電流(gate tunneling leakage)。通道內水平方向的垂直電場分佈及多晶矽閘極(poly-Si gate)U形邊界的電流密度分佈決定了閘極漏電流(gate tunneling leakage)。在第三章中,透過SPICE模擬軟體,閘極漏電流(gate tunneling leakage)的分割電流將在模型中被用來特性化IG曲線。根據SPICE模型及調整參數,60奈米部分解離絕緣體上N型矽金氧半(PD SOI NMOS)元件的閘極漏電流(gate tunneling leakage)可以準確地被預測出來。第四章為論文總結與未來展望。 The thesis reports the analysis and the modeling of the gate tunneling leakage current behavior of 60nm PD SOI NMOS device using shallow trench isolation(STI). First the evolution of the SOI device and its characteristics with the trend of gate oxide thickness and the related gate current are introduced in Chapter 1. In Chapter 2, the floating-body-effect-related gate tunneling leakage current behavior of 60nm PD SOI NMOS device is presented. The turn-on of parasitic bipolar of the device not only causes kink effect but also affects the gate tunneling leakage current as verified by the experimental data and simulation results. The vertical electric field in lateral channel direction and the current density distribution of the U-shaped edges of the poly-silicon gate determine the gate tunneling leakage current. In Chapter 3, via using SPICE the partitioned charge model of the SPICE gate tunneling current model has been used in characterizing IG. Based on the SPICE model with the finely-tuned parameters, the gate leakage current of the 60nm PD SOI NMOS device could be accurately predicted. Chapter 4 is the conclusion and the future work. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/9342 |
全文授權: | 同意授權(全球公開) |
顯示於系所單位: | 電子工程學研究所 |
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