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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/92606| 標題: | 應用於封包追蹤的Doherty功率放大器設計與特性分析 Design and Characterization of Doherty Power Amplifier for Envelope Tracking |
| 作者: | 安彥百 Yen-Bai Ann |
| 指導教授: | 陳昭宏 Jau-Horng Chen |
| 關鍵字: | Doherty功率放大器,電源調變器,封包追蹤,第五代行動通訊系統,功率附加效率, Doherty Power Amplifier,Supply modulator,Envelope tracking,5G,Power Added Efficiency, |
| 出版年 : | 2024 |
| 學位: | 碩士 |
| 摘要: | 本論文針對1-C基地台5G NR頻段1(2110-2170 MHz)的發射機,設計了一雙輸入的Doherty功率放大器,並以FR4(Flame Retardant-4)作為電路板基材。在5G NR頻段2(1930-1990 MHz)的操作下,該功率放大器峰值輸出功率為38.4 dBm,汲極效率(Drain Efficiency, DE)達到44.7%。當輸出功率為34.4 dBm時,DE達到45.4%,呈現4 dB的功率退讓點。在低輸出功率(<30dBm)情況下,增益為15.8 dB,P3dB增益壓縮點在輸出功率36.7 dBm時,增益為12.7 dB,同時DE達到46.4%。
此外,本論文對所設計的雙輸入Doherty功率放大器進行主功率放大器的汲極等效電路建模,以應用於電源調變器的設計。結果顯示,主功率放大器的汲極等效阻抗可用多項式函數來表達,其中輸出電壓最高次項為三次,汲極電壓最高次項為一次。透過所提出的等效電路拓墣,並同時確定主功率放大器最佳效率的工作曲線,綜合上述即能得到對應最佳效率的汲極等效阻抗,作為封包追蹤Doherty功率放大器之電源調變器設計依據。 This thesis addresses the design and analysis of a dual-input Doherty power amplifier (DPA) for the transmitter of the 1-C base station operating in the 5G NR frequency band 1 (2110-2170 MHz). The amplifier is implemented using FR4 (Flame Retardant-4) as the substrate of the PCB. Operating within the 5G NR frequency band 2 (1930-1990 MHz), the DPA demonstrates a peak output power of 38.4 dBm with a Drain Efficiency (DE) of 44.7%. At an output power of 34.4 dBm, the DE increases to 45.4%, revealing a 4 dB power back-off point. At low output power levels (<30 dBm), the gain is approximately 15.8 dB, with a 3 dB gain compression point occurring at an output power of 36.7 dBm, a gain of 12.7 dB, and a DE of 46.4%. Additionally, this thesis delves into the modeling of the drain equivalent circuit of the main power amplifier in the designed dual-input DPA. This modeling is conducted for its application in supply modulators. The findings indicate that the drain equivalent impedance of the main power amplifier can be accurately expressed as a polynomial function, with the highest order term in the output voltage being cubic and in the drain voltage being linear. By incorporating the proposed equivalent circuit topology and establishing the optimal efficiency operating curve for the main power amplifier, the corresponding drain equivalent impedance for optimal efficiency is determined. This serves as a foundational basis for the design of the supply modulator for the envelope tracking DPA. |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/92606 |
| DOI: | 10.6342/NTU202400935 |
| 全文授權: | 同意授權(限校園內公開) |
| 電子全文公開日期: | 2029-05-05 |
| 顯示於系所單位: | 工程科學及海洋工程學系 |
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