具內迴路電荷控制與突衝模式LLC諧振轉換器之FPGA實現

Abstract

LLC諧振轉換器因其高效率、高功率密度以及軟切換之特性，被廣泛應用於現代商業電子產品中。數位控制晶片不僅能整合多個功能至單一晶片，透過FPGA驗證功能性亦可有較彈性的優化過程。本文所提出之數位多功能LLC諧振轉換器內迴路電荷控制，透過Xilinx FPGA晶片數位控制，實現頻率限制之數位載波控制、多階段緩啟動功能、以及突衝模式的整合功能。內迴路電荷控制模式可以把系統的複數極點解耦合為兩個極點，使系統設計更加簡易。同時採用單邊諧振電容電壓命令與雙邊諧振電容電壓命令控制架構使系統在穩態操作時不會有電流不平衡之現象，而在突衝模式時可以透過控制雙開關來達到減少切換耗損。接續以現有架構與所採用之控制模式進行時域分析、穩態操作分析、電壓增益分析、推導小信號模型。所有數位設計功能皆透過三方整合模擬平台(PSIM、ModelSim、Maltlab Simulink)模擬，並驗證所提之架構與功能的可行性與正確性。最終完成一輸入直流電壓400 V、輸出電壓20 V、滿載操作條件200 W、最高效率達98.25%、以FPGA實現數位控制之多功能LLC諧振轉換器內迴路電荷控制。以實驗量測結果證實架構之可行性。

LLC resonant LLC resonant converters have been widely utilized in various modern commercial electronic products due to their high efficiency, high power density, and soft-switching characteristics. Digital controller chips allow the integration of multiple functions into a single chip. It provides a more flexible optimizing process through FPGA implementation and verification. This thesis proposes a digital LLC resonant converter with inner-loop charge control and multi-functions. The digital controller integrates frequency limitation of switching frequency, digital pulse-width modulator, multi-step soft start function, and burst mode function based on Xilinx FPGA. The inner-loop charge control decouples the system’s complex pole into two single poles for a more accessible design. Using single-side and double-side control structures prevents current imbalance during steady-state operation and reduces switching losses during burst mode function by controlling both switches simultaneously. The thesis conducts time-domain analysis, steady-state operation analysis, voltage gain analysis, and derivation of small-signal models for the adopted architecture and control methods. All digital design functions are verified through a co-simulation platform (PSIM, ModelSim, Matlab Simulink) to confirm the feasibility and correctness of the proposed architecture and functions. Ultimately, a digital control multi-functions LLC resonant converter with inner-loop charge control based on FPGA is proposed, operating under an input DC voltage of 400 V, output voltage of 20 V, and a full-load operation of 200 W with a maximum efficiency of 98.25%. Experimental measurements validate the feasibility of the architecture.