Arm和RISC-V架構編譯器自動向量化和超字組平行的設計與分析

Abstract

在當今資料驅動的時代，處理大數據的需求也迅速提升，因此程式執行效能成為重要的研究方向。現代處理器普遍配備了單指令多資料流（Single Instruction, Multiple Data, SIMD）處理元件，且各種指令集架構均支持相對應的向量擴展指令集，例如Arm支援Neon與 SVE，RISC-V支援RVV。自動向量化為一種編譯器最佳化技術，可以讓程式碼在編譯階段自動轉換為向量指令，從而充分發揮向量處理單元的性能，提高程式運行效率。本研究探討了LLVM編譯器內實現的超字組平行（Superword Level Parallelism, SLP）自動向量化技術，並且針對當前演算法中尚未涵蓋的領域進行改良最佳化，以拓寬SLP技術的應用場景。進一步地，本研究分別在Arm和RISC-V架構上進行了模擬效能測試，以驗證改良演算法的實際效益。

In the data-driven era, the demand for processing large datasets has rapidly increased, and execution efficiency has become an important research direction. Modern processors are commonly equipped with Single Instruction, Multiple Data (SIMD) processing units, and various instruction set architectures support corresponding vector extension instruction sets. Auto-vectorization is a compiler optimization technique that enables program codes to be automatically translated into vector instructions during the compilation stage, thereby fully utilizing the vector processing unit and enhancing the efficiency of program execution. We investigate the superword level parallelism (SLP) auto-vectorization implemented in the LLVM compiler and refine the existing algorithm in order to expand the scope of its application scenarios. Furthermore, this research has conducted performance simulation and evaluations on Arm and RISC-V architectures to verify the actual benefits of the improved algorithm.