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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林致廷 | zh_TW |
| dc.contributor.advisor | Chih-Ting Lin | en |
| dc.contributor.author | 蔡駿杰 | zh_TW |
| dc.contributor.author | Chun-Chieh Tsai | en |
| dc.date.accessioned | 2023-08-15T17:59:28Z | - |
| dc.date.available | 2023-11-09 | - |
| dc.date.copyright | 2023-08-15 | - |
| dc.date.issued | 2023 | - |
| dc.date.submitted | 2023-08-07 | - |
| dc.identifier.citation | [1] M. Higashiwaki, K. Sasaki, A. Kuramata, T. Masui, and S. Yamakoshi, "Gallium oxide (Ga2O3) metal-semiconductor field-effect transistors on single-crystal β-Ga2O3 (010) substrates," Applied Physics Letters, vol. 100, no. 1, 2012.
[2] Y. Développement, "GaN Power 2021: Epitaxy, Devices, Applications and Technology Trends report," 2021. [3] Y.-C. Wan, "Fabrication and Characterization of AlInGaN/GaN Millimeter Wave Power Transistors," 2020. [4] Y. Sun et al., "Review of the recent progress on GaN-based vertical power Schottky barrier diodes (SBDs)," Electronics, vol. 8, no. 5, p. 575, 2019. [5] T. Liu, S. Chen, and P. Wang, "Analysis on the application, development, and future prospects of Gallium Nitride (GaN)," presented at the 2020 International Conference on Optoelectronic Materials and Devices, 2021. [6] J. N. Burghartz, Ed. Ultra-thin Chip Technology and Applications. 2016. [7] E. T.-e. PE. "What is a GaN Transistor?" (accessed. [8] O. Ambacher et al., "Two dimensional electron gases induced by spontaneous and piezoelectric polarization in undoped and doped AlGaN/GaN heterostructures," Journal of applied physics, vol. 87, no. 1, pp. 334-344, 2000. [9] J. P. Ibbetson, P. T. Fini, K. D. Ness, S. P. DenBaars, J. S. Speck, and U. K. Mishra, "Polarization effects, surface states, and the source of electrons in AlGaN/GaN heterostructure field effect transistors," Applied Physics Letters, vol. 77, no. 2, pp. 250-252, 2000, doi: 10.1063/1.126940. [10] F. Sacconi, A. D. Carlo, P. Lugli, and Hadis Morkoç, Fellow, and IEEE, "Spontaneous and Piezoelectric Polarization Effects on the Output Characteristics of AlGaN/GaN Heterojunction Modulation Doped FETs," 2001. [11] Y.-W. Chen, "Study of Ohmic Contact to p-type AlGaN," 2006. [12] A. Zahin, "Schottky Barrier Heights at Two-Dimensional Metallic and Semiconducting Transition-Metal Dichalcogenide Interfaces," 2017. [13] P. Zhang, "Effects of surface roughness on electrical contact, RF heating and field enhancement," University of Michigan, 2012. [14] C. Langpoklakpam et al., "Review of silicon carbide processing for power MOSFET," Crystals, vol. 12, no. 2, p. 245, 2022. [15] Z.-F. Ｈuang and T.-F. Zhang, "Overview of GaN Based Power Device," 2014. [16] D. M. Pozar, Microwave Engineering, 3 ed. 2004. [17] S.-Y. Lo, "Integrating Aluminum Nitride Film Buffer Layer and Surface Passivation Layer Technology in the Production of T-gate High Electron Mobility Transistors and High Frequency Analysis," 2020. [18] Y. Zhang et al., "Millimeter-wave AlGaN/GaN HEMTs with 43.6% power-added-efficiency at 40 GHz fabricated by atomic layer etching gate recess," IEEE Electron Device Letters, vol. 41, no. 5, pp. 701-704, 2020. [19] Samsung. "Printing circuits onto wafers: ‘Photoresist’." (accessed. [20] M. Lyubomirskiy, "High energy X-ray inline interferometry based on refractive optics," 2016. [21] K. University, "Electron-Beam Evaporation," ed. [22] L. Vigen, "Etching AlGaN alloys using ICP-RIE," ed, 2019. [23] R. CO. "MEMS." (accessed. [24] Wise-Creative. "ULVAC CC-200 PECVD化學氣相沈積." (accessed. [25] S. S. o. A. S. Adlershof. "Scanning-electron microscopy." (accessed. [26] K. L. House, L. Pan, D. M. O'Carroll, and S. Xu, "Applications of scanning electron microscopy and focused ion beam milling in dental research," European Journal of Oral Sciences, vol. 130, no. 2, p. e12853, 2022. [27] KEYSIGHT. "Network Analyzer." (accessed. [28] S. Saadaoui, O. Fathallah, and H. Maaref, "Effects of gate length on GaN HEMT performance at room temperature," Journal of Physics and Chemistry of Solids, vol. 161, 2022, doi: 10.1016/j.jpcs.2021.110418. [29] Z.-H. Tong, P. Ding, Y.-B. Su, D.-H. Wang, and Z. Jin, "Influences of increasing gate stem height on DC and RF performances of InAlAs/InGaAs InP-based HEMTs*," Chinese Physics B, vol. 30, no. 1, 2021, doi: 10.1088/1674-1056/abb30d. [30] K. Karami et al., "Robust sub-100 nm T-Gate fabrication process using multi-step development," Micro and Nano Engineering, vol. 19, 2023, doi: 10.1016/j.mne.2023.100211. [31] Y.-C. Liu, "Investigation of Gate-Length Downscaling of AlGaN/GaN HEMT by Alignment Mark Improvement," 2022. [32] L.-C. Chang, K.-C. Hsu, Y.-T. Ho, W.-C. Tzeng, Y.-L. Ho, and C.-H. Wu, "High f max× L G product of AlGaN/GaN HEMTs on Silicon with thick rectangular gate," IEEE Journal of the Electron Devices Society, vol. 8, pp. 481-484, 2020. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/88837 | - |
| dc.description.abstract | 氮化鎵屬於第三代半導體，具備了寬能隙、高電子遷移率、高載子傳輸速度與高崩潰電場等特性，而以氮化鋁鎵/氮化鎵為材料的高電子遷移率電晶體，在氮化鋁鎵及氮化鎵接面處會有極化反應的產生，進而生成高濃度的二維電子氣(Two-dimensional electron gas, 2DEG)，使得此電晶體能在高頻及高功率元件中有良好的特性表現及發展空間。
本論文採用以碳化矽(SiC)基板為底搭配氮化鎵磊晶層而成之試片，研究微縮閘極線寬對高電子遷移率電晶體之影響，且將該製作之元件進行電性量測及分析。此外，本論文並於矽基板上利用三層光阻( ZEP(1:1)/LOR/ZEP(1:1) )之T型閘極技術與角標對準優化技術製作出小閘極線寬。利用角標對準優化技術，讓實驗之二次對準良率提高，再加上三層光阻( ZEP(1:1)/LOR/ZEP(1:1) )定義出T型的閘極，並使用電子束微影技術成功開發出閘極線寬(T型閘極的, T-foot,)78.5奈米的元件，最後利用簡化後的公式，進行高頻特性參數的估算及比較。 | zh_TW |
| dc.description.abstract | Gallium nitride (GaN) belongs to the third generation of semiconductors, possessing characteristics such as a wide bandgap, high electron mobility, high carrier velocity, and high breakdown electric field. High electron mobility transistors (HEMTs) using AlGaN/GaN as the material exhibit polarization effects at the AlGaN/GaN interface, resulting in the generation of a high-density two-dimensional electron gas (2DEG). This enables the HEMTs to exhibit excellent performance and development potential in high-frequency and high-power devices.
This study utilizes silicon carbide (SiC) substrates with GaN epitaxial layers to investigate the effect of gate width reduction on HEMTs, and to perform electrical measurements and analyses on the fabricated devices. Additionally, this work employs a T-gate fabrication technique using three layers of resist (ZEP(1:1) / LOR / ZEP(1:1)) and an alignment optimization technique on silicon substrates to produce smaller gate widths. By utilizing the alignment optimization technique, the secondary alignment yield of the experiment is improved. Moreover, a T-shaped gate was defined using a three-layer photoresist (ZEP(1:1)/LOR/ZEP(1:1)), and the electron beam lithography technique was successfully employed to develop devices with a gate width (T-foot, the foot of the T-shaped gate) of 78.5 nanometers. Finally, a simplified formula is used to estimate and compare high-frequency characteristic parameters. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2023-08-15T17:59:28Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2023-08-15T17:59:28Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 口試委員審定書 II
致謝 II 中文摘要 IV Abstract V 目錄 VI 圖目錄 VIII 表目錄 XI 第一章 緒論 1 1.1 前言 1 1.2 研究動機 2 1.3 論文架構 4 第二章 理論基礎 5 2.1 氮化鎵(GaN) 5 2.2 氮化鋁鎵/氮化鎵之異質結構特性 6 2.2.1 自發極化(Spontaneous polarization) 6 2.2.2 壓電極化(Piezoelectric polarization) 7 2.2.3 二維電子氣(Two-Dimensional Electron Gas, 2DEG) 9 2.3 半導體與金屬接面 10 2.3.1 歐姆接觸(Ohmic contact) 11 2.3.2 蕭特基接觸(Schottky contact) 12 2.3.3 傳輸線模型原理(Transfer Length Method, TLM) 12 2.4 碳化矽(SiC) 13 2.5 高頻理論 14 2.5.1 雙埠網路(Two-port network) 14 2.5.2 開路短路襯墊去嵌化(open short pad de-embedding) 18 2.5.3 電流增益截止頻率(current gain cutoff frequency, fT) 19 2.5.4 功率增益截止頻率(power gain cutoff frequency, fmax) 20 第三章 實驗儀器介紹 21 3.1 微影技術(Lithography) 21 3.2 電子束蒸鍍機(Electron Beam Evaporator, E-gun) 23 3.3 快速升溫熱退火(Rapid Thermal Anneal, RTA) 24 3.4 反應式離子蝕刻機（Reactive Ion Etching, RIE） 24 3.5 感應耦合電漿反應式離子蝕刻機(Inductively Coupled Plasma Reactive Ion Etching, ICP-RIE) 25 3.6 電漿輔助化學氣相沉積(Plasma-Enhanced Chemical Vapor Deposition, PECVD) 26 3.7 掃描式電子顯微鏡(Scanning Electron Microscope, SEM) 27 3.8 聚焦離子束顯微鏡(Focused Ion Beam, FIB) 28 3.9 網路分析儀(Network Analyzer) 29 第四章 實驗設計與製程 30 4.1 文獻回顧 30 4.1.1 縮小閘極線寬(Lg)用以提升元件特性[28] 30 4.1.2 T型閘極[3, 29, 30] 31 4.2 元件設計 32 4.2.1 元件基板磊晶結構及特性 32 4.2.2 光罩設計 32 4.3 元件製程 34 第五章 實驗結果與分析 44 5.1 直流量測 44 5.2 T型閘極 48 5.3 fT與fmax估算 51 第六章 結論與未來展望 54 參考文獻 55 | - |
| dc.language.iso | zh_TW | - |
| dc.subject | 電子束微影技術 | zh_TW |
| dc.subject | T型閘極 | zh_TW |
| dc.subject | 碳化矽基板 | zh_TW |
| dc.subject | 高電子遷移率電晶體 | zh_TW |
| dc.subject | 高頻 | zh_TW |
| dc.subject | SiC substrate | en |
| dc.subject | High frequency | en |
| dc.subject | HEMTs | en |
| dc.subject | T-gate | en |
| dc.subject | EBL | en |
| dc.title | 微縮閘極線寬之SiC基板HEMT的電性研究與三層光阻法開發T型閘極 | zh_TW |
| dc.title | Investigation of Electrical Characteristics in Scaled-Gate-Length HEMTs on SiC Substrates and Development of a Three-Layer Photoresist Technique for T-Gate Fabrication | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 111-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.coadvisor | 蘇文生 | zh_TW |
| dc.contributor.coadvisor | Vin-Cent Su | en |
| dc.contributor.oralexamcommittee | 孫允武;孫建文;朱富權 | zh_TW |
| dc.contributor.oralexamcommittee | Yuen-Wuu Suen;Kien-Wen Sun;Fu-Chiuan Ju | en |
| dc.subject.keyword | T型閘極,碳化矽基板,電子束微影技術,高電子遷移率電晶體,高頻, | zh_TW |
| dc.subject.keyword | T-gate,SiC substrate,EBL,HEMTs,High frequency, | en |
| dc.relation.page | 56 | - |
| dc.identifier.doi | 10.6342/NTU202303460 | - |
| dc.rights.note | 同意授權(全球公開) | - |
| dc.date.accepted | 2023-08-10 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電子工程學研究所 | - |
| 顯示於系所單位： | 電子工程學研究所 | |
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