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  1. NTU Theses and Dissertations Repository
  2. 工學院
  3. 應用力學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/8880
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dc.contributor.advisor張培仁(Pei-Zen Chang),胡毓忠(Yuh-Chung Hu)
dc.contributor.authorWan-Chun Chuangen
dc.contributor.author莊婉君zh_TW
dc.date.accessioned2021-05-20T20:03:13Z-
dc.date.available2016-08-26
dc.date.available2021-05-20T20:03:13Z-
dc.date.copyright2011-08-26
dc.date.issued2011
dc.date.submitted2011-08-15
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/8880-
dc.description.abstract本研究研發出一套適用於晶圓級檢測(wafer level testing)的材料機械性質量測技術。研究中發展一套以電信號與白光干涉儀( White Light Interferometers )檢測結果,萃取薄膜材料性質的演算法。本研究先以尤拉樑(Euler’s beam)模型以及最小能量法(minimum energy method)為理論基礎,推導出具初始應力之微橋狀樑在承受靜電負載下的吸附電壓(pull-in voltage)的近似解析解(approximate analytical solution),藉由量測兩組長度不同的橋狀樑測試鍵(bridge-type testkey)之吸附電壓,反算其楊氏模數(Young’s modulus)與平均應力(mean stress);再利用樑之撓曲公式(flexure formula)與彈性曲線方程式(elastic curve),藉由量測懸臂樑型測試鍵(cantilever-type testkey)因應力釋放之自由端最大變形量,進而求得梯度應力(gradient stress)。研究中以台積電0.18 微米製程之metal 2作為測試結構材料,及參考Osterberg發表之文獻中提供的(100)單晶矽橋狀樑、(110)單晶矽橋狀樑之吸附電壓實驗值,使用本研究提出的演算法進行材料參數萃取,所得之楊氏模數、平均應力與梯度應力數值均具有良好的準確度。此外,本研究並探討此演算法之穩健性(robustness)影響因素包含吸附電壓量測之靈敏性分析(sensitivity analysis)與測試鍵尺寸效應(dimension effects),以提供元件設計者作為設計參考指標。本研究建立之晶圓級薄膜機械性質萃取技術,可利用現有之半導體製程中使用的量測設備,於晶圓製程線上進行量測與監控。zh_TW
dc.description.abstractThis research develops the technologies of mechanical characterization of CMOS-MEMS devices, and presents a robust algorithm for extracting mechanical properties, such as Young’s modulus, mean stress, and gradient stress, through the external electrical circuit behavior and pre-deformation of the micro test-key. First, an approximate analytical solution for the pull-in voltages of bridge-type testkey subjected to electrostatic loads and initial stress is derived based on the Euler’s beam model and the minimum energy method. Then one can use the aforesaid closed form solution of the pull-in voltage to extract the Young’s modulus and mean stress of the test structures. Second, according to the flexure formula and elastic curve of a cantilever beam, the gradient stress can be obtained by measuring the pre-deformation of the cantilever-type testkey utilizing White Light Interferometer. The test cases include the testkeys fabricated by TSMC 0.18 μm standard CMOS process, and the experimental results refer to Osterberg’s work about the pull-in voltage of single crystal silicone micro bridges. The extracting material properties calculated by the present algorithm are valid. Besides, this research study the robustness of this algorithm including sensitivity analysis for pull-in voltage measurement and dimension effects of testkeys. This mechanical properties extracting method is expected to be applicable to the wafer-level testing in micro-device manufacture and compatible with the wafer-level testing in IC industry since the test is non-destructive.en
dc.description.provenanceMade available in DSpace on 2021-05-20T20:03:13Z (GMT). No. of bitstreams: 1
ntu-100-D96543004-1.pdf: 1100061 bytes, checksum: febcc82b7aa0342821403c03d3054605 (MD5)
Previous issue date: 2011
en
dc.description.tableofcontents謝誌 I
中文摘要 II
Abstract III
Figures VI
Tables IX
Nomenclature XI
Chapter 1 Introduction 1
1.1 State of the Art Technology 1
1.2 Thesis Structure 9
Chapter 2 Electromechanical Behavior of the Testkeys 10
2.1 Bridge-type Testkey 10
2.1.1 Energy Expression 11
2.1.2 Approximate Analytical Solution to Pull-in Voltage 13
2.2 Cantilever-type Testkey 16
Chapter 3 Wafer-Level Mechanical Properties Extracting 18
3.1 Algorithm 18
3.2 Comparison with M-TEST 21
Chapter 4 Experiment Methodology 25
4.1 Sample Preparation 25
4.2 Pull-in Voltage Detecting 30
4.2.1 Capacitance-Voltage Measurement 31
4.2.2 The Pull-in Voltage Results of Bridge-type Testkey 34
4.3 The Pre-deformation of Cantilever-type Testkey 36
4.4 Extracting Mechanical Properties of Structural Material 38
Chapter 5 Robustness Discussion 41
5.1 Sensitivity Analysis for Pull-in Voltage Measurement 41
5.2 Dimension Effects of Testkeys 44
Chapter 6 Conclusions 51
Chapter 7 Future Work 54
Publication List of the Author 55
References 56
Appendix A Capacitance-Voltage Measurement Results 60
Appendix B The Extracted Results for Common Materials 65
dc.language.isoen
dc.title晶圓級薄膜機械性質萃取技術之研發zh_TW
dc.titleCMOS-MEMS Testkey for Wafer-Level Mechanical Properties Extractingen
dc.typeThesis
dc.date.schoolyear99-2
dc.description.degree博士
dc.contributor.advisor-orcid,胡毓忠(ychu@niu.edu.tw)
dc.contributor.oralexamcommittee黃榮堂(Jung-Tang Huang),方維倫(Wei-Leun Fang),楊龍杰(Lung-Jieh Yang),戴慶良(Ching-Liang Dai),施文彬(Wen-Pin Shih),林宗賢(Zong-Shen Lin)
dc.subject.keyword楊氏模數,平均應力,梯度應力,積體電路相容之微機電技術,zh_TW
dc.subject.keywordpull-in voltage,Young’s modulus,mean stress,gradient stress,CMOS-MEMS,en
dc.relation.page75
dc.rights.note同意授權(全球公開)
dc.date.accepted2011-08-16
dc.contributor.author-college工學院zh_TW
dc.contributor.author-dept應用力學研究所zh_TW
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